STR711FR2T6 STMicroelectronics, STR711FR2T6 Datasheet - Page 12

• Manufacturer Part Number: STR711FR2T6
• Description: IC MCU ARM7 TDMI 256K 64-LQFP
• Manufacturer: STMicroelectronics
• Series: STR7r

Specifications of STR711FR2T6

• Core Processor: ARM7
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: HDLC, I²C, SmartCard, SPI, UART/USART, USB
• Peripherals: PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 256KB (256K x 8 + 16K)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: STR711x
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: CAN/EMI/USB
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 30
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MCBSTR7, KSK-STR711-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: STR710-SK/HIT, STR711-SK/IAR, STR712-SK/IAR, STR71X-SK/RAIS, STX-PRO/RAIS, STX-RLINK, STR79-RVDK/CPP, STR79-RVDK, STR79-RVDK/UPG
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 12-bit
• For Use With: MCBSTR7UME - MCBSTR7 + ULINK-ME DEV KITMCBSTR7 - BOARD EVAL STM STR71X SERIES497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU497-4550 - KIT IAR STARTER STR711/STR712
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-4513

System architecture
12/78
Table 3.
Legend / abbreviations for
Type:
In/Output level: C = CMOS 0.3V
Port and control configuration:
Input:
Output:
10
11
12
1
2
3
4
5
6
7
8
9
P0.10
P0.3
VSS
P0.6
A.19
P0.2
VSS
A.12
V33
A.9
A.8
A.7
A
STR710 BGA ball connections
WEn.1
P2.0
P0.9
P0.7
A.15
P0.1
A.10
RDn
N.C.
N.C.
V33
A.4
B
I = input, O = output, S = supply, HiZ= high impedance,
C
T
C/T = Programmable levels: CMOS 0.3V
pu/pd= software enabled internal pull-up or pull down
pu= in reset state, the internal 100kΩ weak pull-up is enabled.
pd = in reset state, the internal 100kΩ weak pull-down is enabled.
OD = open drain (logic level)
PP = push-pull
T = true OD, (P-Buffer and protection diode to V
5 V tolerant.
T
T
= TTL 0.8 V/2 V with input trigger
= CMOS 0.3V
WEn.0
P0.11
P0.12
P1.15
P1.14
P2.1
P0.8
A.16
P0.4
A.11
A.5
A.3
C
VSS18
P0.13
P0.14
P1.13
P1.10
P0.5
A.17
A.13
P1.9
Table
VSS
V33
A.6
D
DD
DD
4:
/0.7V
/0.7V
P2.2
P2.3
P2.4
P2.5
P2.7
A.18
P0.0
VSS
V18
V33
A.2
A.1
E
DD
DD
CANRX
P1.11/
P2.6
P2.8
A.14
D.15
D.14
D.13
N.C.
N.C.
VSS
V33
A.0
with input trigger
F
USBDN
USBDP
BOOT
P2.10
P2.11
P2.14
P2.9
D.12
D.11
D.10
N.C.
V18
EN
G
CANTX
V33IO-
P1.12/
DD
P2.12
JTMS
JTCK
JTDO
P1.8
P1.7
N.C.
N.C.
VSS
PLL
D.1
H
/0.7V
JTRST
RTCX-
P2.13
DD
P1.6
N.C.
N.C.
DD
NU
D.0
D.9
D.8
D.5
CK
TO
J
n
not implemented),
or TTL 0.8 V / 2 V
RTCXTI
CKOUT
V18BK
AVSS
P2.15
TEST
P1.0
P1.5
P1.4
V33
D.7
nc
K
P
VSSIO-
VSS18
TEST
JTDI
P1.1
P1.3
N.C.
N.C.
VSS
BKP
N.C.
PLL
D.3
D.6
L
STR71xF
STDBY
RSTIN
AVDD
P0.15
DBG
RQS
P1.2
N.C.
N.C.
N.C.
N.C.
D.2
D.4
M