STR711FR2T6 STMicroelectronics, STR711FR2T6 Datasheet - Page 7

• Manufacturer Part Number: STR711FR2T6
• Description: IC MCU ARM7 TDMI 256K 64-LQFP
• Manufacturer: STMicroelectronics
• Series: STR7r

Specifications of STR711FR2T6

• Core Processor: ARM7
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: HDLC, I²C, SmartCard, SPI, UART/USART, USB
• Peripherals: PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 256KB (256K x 8 + 16K)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: STR711x
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: CAN/EMI/USB
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 30
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MCBSTR7, KSK-STR711-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: STR710-SK/HIT, STR711-SK/IAR, STR712-SK/IAR, STR71X-SK/RAIS, STX-PRO/RAIS, STX-RLINK, STR79-RVDK/CPP, STR79-RVDK, STR79-RVDK/UPG
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 12-bit
• For Use With: MCBSTR7UME - MCBSTR7 + ULINK-ME DEV KITMCBSTR7 - BOARD EVAL STM STR71X SERIES497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU497-4550 - KIT IAR STARTER STR711/STR712
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-4513

STR71xF
3.1
Flexible power management
To minimize power consumption, you can program the STR71x to switch to SLOW, WAIT,
LPWAIT (low power wait), STOP or STANDBY mode depending on the current system
activity in the application.
Flexible clock control
Two external clock sources can be used, a main clock and a 32 kHz backup clock. The
embedded PLL allows the internal system clock (up to 66 MHz) to be generated from a main
clock frequency of 16 MHz or less. The PLL output frequency can be programmed using a
wide selection of multipliers and dividers. The microcontroller core, APB1 and APB2
peripherals are in separate clock domains and can be programmed to run at different
frequencies during application runtime. The clock to each peripheral is gated with an
individual control bit to optimize power usage by turning off peripherals any time they are not
required.
Voltage regulators
The STR71x requires an external 3.0-3.6V power supply. There are two internal Voltage
Regulators for generating the 1.8V power supply for the core and peripherals. The main VR
is switched off during low power operation.
Low voltage detectors
Both the Main Voltage Regulator and the Low Power Voltage Regulator contain each a low
voltage detection circuitry which keep the device under reset when the corresponding
controlled voltage value (V
security of the system by preventing the MCU from going into an unpredictable state.
An external reset circuit must be used to provide the RESET at V
sufficient to rely on the RESET generated by the LVD in this case. This is because LVD
operation is guaranteed only when V
On-chip peripherals
CAN interface (STR710 and STR712)
The CAN module is compliant with the CAN specification V2.0 part B (active). The bit rate
can be programmed up to 1 MBaud.
USB interface (STR710 and STR711)
The full-speed USB interface is USB V2.0 compliant and provides up to 16 bidirectional/32
unidirectional endpoints, up to 12 Mb/s (full-speed), support for bulk transfer, isochronous
transfers and USB Suspend/Resume functions.
Standard timers
Each of the four timers have a 16-bit free-running counter with 7-bit prescaler
Three timers each provide up to two input capture/output compare functions, a pulse
counter function, and a PWM channel with selectable frequency.
The fourth timer is not connected to the I/O ports. It can be used by the application software
for general timing functions.
18
or V
18BKP
33
) falls below 1.35V (+/- 10%). This enhances the
is within the specification.
33
power-up. It is not
System architecture
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