MC9S12XEG128MAA Freescale Semiconductor, MC9S12XEG128MAA Datasheet - Page 28
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MC9S12XEG128MAA
Manufacturer Part Number
MC9S12XEG128MAA
Description
MCU 16BIT 128K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XEP768CAL.pdf
(1328 pages)
Specifications of MC9S12XEG128MAA
Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
59
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
No. Of I/o's
59
Eeprom Memory Size
2KB
Ram Memory Size
12KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XEG128MAA
Manufacturer:
NXP
Quantity:
3 330
Company:
Part Number:
MC9S12XEG128MAA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XEG128MAA
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC9S12XEG128MAA/S912XEG128J1MAA
Manufacturer:
FREESCALE
Quantity:
20 000
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Chapter 1 Device Overview MC9S12XE-Family
28
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
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16-Bit CPU12X
— Upward compatible with MC9S12 instruction set with the exception of five Fuzzy instructions
— Enhanced indexed addressing
— Access to large data segments independent of PPAGE
INT (interrupt module)
— Eight levels of nested interrupts
— Flexible assignment of interrupt sources to each interrupt level.
— External non-maskable high priority interrupt (XIRQ)
— Internal non-maskable high priority Memory Protection Unit interrupt
— Up to 24 pins on ports J, H and P configurable as rising or falling edge sensitive interrupts
EBI (external bus interface)(available in 208-Pin and 144-Pin packages only)
— Up to four chip select outputs to select 16K, 1M, 2M and up to 4MByte address spaces
— Each chip select output can be configured to complete transaction on either the time-out of one
MMC (module mapping control)
DBG (debug module)
— Monitoring of CPU and/or XGATE busses with tag-type or force-type breakpoint requests
— 64 x 64-bit circular trace buffer captures change-of-flow or memory access information
BDM (background debug mode)
MPU (memory protection unit)
— 8 address regions definable per active program task
— Address range granularity as low as 8-bytes
— No write / No execute Protection Attributes
— Non-maskable interrupt on access violation
XGATE
— Programmable, high performance I/O coprocessor module
— Transfers data to or from all peripherals and RAM without CPU intervention or CPU wait states
— Performs logical, shifts, arithmetic, and bit operations on data
— Can interrupt the HCS12X CPU signalling transfer completion
— Triggers from any hardware module as well as from the CPU possible
— Two interrupt levels to service high priority tasks
— Hardware support for stack pointer initialisation
OSC_LCP (oscillator)
— Low power loop control Pierce oscillator utilizing a 4MHz to 16MHz crystal
— Good noise immunity
— Full-swing Pierce option utilizing a 2MHz to 40MHz crystal
— Transconductance sized for optimum start-up margin for typical crystals
IPLL (Internally filtered, frequency modulated phase-locked-loop clock generation)
(MEM, WAV, WAVR, REV, REVW) which have been removed
of the two wait state generators or the deassertion of EWAIT signal
MC9S12XE-Family Reference Manual , Rev. 1.23
Freescale Semiconductor
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