MC9S12XEG128MAA Freescale Semiconductor, MC9S12XEG128MAA Datasheet - Page 735
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MC9S12XEG128MAA
Manufacturer Part Number
MC9S12XEG128MAA
Description
MCU 16BIT 128K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XEP768CAL.pdf
(1328 pages)
Specifications of MC9S12XEG128MAA
Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
59
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
No. Of I/o's
59
Eeprom Memory Size
2KB
Ram Memory Size
12KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XEG128MAA
Manufacturer:
NXP
Quantity:
3 330
Company:
Part Number:
MC9S12XEG128MAA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XEG128MAA
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC9S12XEG128MAA/S912XEG128J1MAA
Manufacturer:
FREESCALE
Quantity:
20 000
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20.3.2.5
Read: Anytime, if AMAP = 1
Write: Anytime, if AMAP = 1
Freescale Semiconductor
Module Base + 0x0002
BERRM[1:0]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
BKDFE
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
2:1
0
W
R
BERRM1
Bit Error Mode — Those two bits determines the functionality of the bit error detect feature. See
Break Detect Feature Enable — BKDFE enables the break detect circuitry.
0 Break detect circuit disabled
1 Break detect circuit enabled
0
0
1
1
SCI Alternative Control Register 2 (SCIACR2)
0
0
7
= Unimplemented or Reserved
BERRM0
Figure 20-8. SCI Alternative Control Register 2 (SCIACR2)
0
1
0
1
0
0
6
Bit error detect circuit is disabled
Receive input sampling occurs during the 9th time tick of a transmitted bit
(refer to
Receive input sampling occurs during the 13th time tick of a transmitted bit
(refer to
Reserved
MC9S12XE-Family Reference Manual Rev. 1.23
Table 20-8. SCIACR2 Field Descriptions
Table 20-9. Bit Error Mode Coding
5
0
0
Figure
Figure
20-19)
20-19)
0
0
4
Description
Function
Chapter 20 Serial Communication Interface (S12SCIV5)
0
0
3
BERRM1
2
0
BERRM0
0
1
Table
BKDFE
20-9.
0
0
735
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