MC9S12XEG128MAA Freescale Semiconductor, MC9S12XEG128MAA Datasheet - Page 847
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MC9S12XEG128MAA
Manufacturer Part Number
MC9S12XEG128MAA
Description
MCU 16BIT 128K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XEP768CAL.pdf
(1328 pages)
Specifications of MC9S12XEG128MAA
Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
59
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
No. Of I/o's
59
Eeprom Memory Size
2KB
Ram Memory Size
12KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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24.3.2.2
The FSEC register holds all bits associated with the security of the MCU and Flash module.
All bits in the FSEC register are readable but not writable.
During the reset sequence, the FSEC register is loaded with the contents of the Flash security byte in the
Flash configuration field at global address 0x7F_FF0F located in P-Flash memory (see
indicated by reset condition F in
phrase containing the Flash security byte during the reset sequence, all bits in the FSEC register will be
set to leave the Flash module in a secured state with backdoor key access disabled.
Freescale Semiconductor
KEYEN[1:0]
RNV[5:2}
SEC[1:0]
Offset Module Base + 0x0001
Reset
2. FDIV shown generates an FCLK frequency of 1.05 MHz
Field
7–6
5–2
1–0
W
R
Backdoor Key Security Enable Bits — The KEYEN[1:0] bits define the enabling of backdoor key access to the
Flash module as shown in
Reserved Nonvolatile Bits — The RNV bits should remain in the erased state for future enhancements.
Flash Security Bits — The SEC[1:0] bits define the security state of the MCU as shown in
Flash module is unsecured using backdoor key access, the SEC bits are forced to 10.
Flash Security Register (FSEC)
F
7
KEYEN[1:0]
= Unimplemented or Reserved
F
6
1. Preferred KEYEN state to disable backdoor key access.
KEYEN[1:0]
Figure 24-6. Flash Security Register (FSEC)
MC9S12XE-Family Reference Manual , Rev. 1.23
00
01
10
11
Figure
Table 24-10. FSEC Field Descriptions
Table
Table 24-11. Flash KEYEN States
F
5
24-11.
24-6. If a double bit fault is detected while reading the P-Flash
Status of Backdoor Key Access
F
4
RNV[5:2]
Description
DISABLED
DISABLED
DISABLED
ENABLED
Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
F
3
(1)
F
2
F
1
Table
Table
SEC[1:0]
24-12. If the
24-3) as
F
0
847
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