MC9S12XEG128MAA Freescale Semiconductor, MC9S12XEG128MAA Datasheet - Page 511
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MC9S12XEG128MAA
Manufacturer Part Number
MC9S12XEG128MAA
Description
MCU 16BIT 128K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XEP768CAL.pdf
(1328 pages)
Specifications of MC9S12XEG128MAA
Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
59
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
No. Of I/o's
59
Eeprom Memory Size
2KB
Ram Memory Size
12KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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13.3.2.2
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0001
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
ETRIGSEL
SRES[1:0]
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
6–5
W
7
R
ETRIGSEL
ATD Control Register 1 (ATDCTL1)
0
7
External Trigger Source Select — This bit selects the external trigger source to be either one of the AD
channels or one of the ETRIG3-0 inputs. See device specification for availability and connectivity of ETRIG3-
0 inputs. If a particular ETRIG3-0 input option is not available, writing a 1 to ETRISEL only sets the bit but has
not effect, this means that one of the AD channels (selected by ETRIGCH3-0) is configured as the source for
external trigger. The coding is summarized in
A/D Resolution Select — These bits select the resolution of A/D conversion results. See
coding.
WRAP3 WRAP2 WRAP1 WRAP0
1. If only AN0 should be converted use MULT=0.
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
SRES1
0
6
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Table 13-3. Multi-Channel Wrap Around Coding
Figure 13-4. ATD Control Register 1 (ATDCTL1)
MC9S12XE-Family Reference Manual Rev. 1.23
Table 13-4. ATDCTL1 Field Descriptions
SRES0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
5
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
SMP_DIS
0
4
Multiple Channel Conversions (MULT = 1)
Table
Wraparound to AN0 after Converting
Description
13-6.
ETRIGCH3
Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)
1
3
AN10
AN11
AN12
AN13
AN14
AN15
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
ETRIGCH2
2
1
ETRIGCH1
1
1
Table 13-5
ETRIGCH0
for
1
0
511
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