MC9S12XEG128MAA Freescale Semiconductor, MC9S12XEG128MAA Datasheet - Page 565

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MC9S12XEG128MAA

Manufacturer Part Number
MC9S12XEG128MAA
Description
MCU 16BIT 128K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEG128MAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
59
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
No. Of I/o's
59
Eeprom Memory Size
2KB
Ram Memory Size
12KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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14.3.2.30 8-Bit Pulse Accumulators Holding Registers (PA3H–PA0H)
Read: Anytime.
Write: Has no effect.
All bits reset to zero.
These registers are used to latch the value of the corresponding pulse accumulator when the related bits in
register ICPAR are enabled (see
Freescale Semiconductor
Module Base + 0x0032
Module Base + 0x0033
Module Base + 0x0034
Module Base + 0x0035
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
W
W
W
R
R
R
R
PA3H7
PA2H7
PA1H7
PA0H7
0
0
0
0
7
7
7
7
Figure 14-53. 8-Bit Pulse Accumulators Holding Register 3 (PA3H)
Figure 14-54. 8-Bit Pulse Accumulators Holding Register 2 (PA2H)
Figure 14-55. 8-Bit Pulse Accumulators Holding Register 1 (PA1H)
Figure 14-56. 8-Bit Pulse Accumulators Holding Register 0 (PA0H)
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
PA3H6
PA2H6
PA1H6
PA0H6
0
0
0
0
6
6
6
6
MC9S12XE-Family Reference Manual Rev. 1.23
Section 14.4.1.3, “Pulse
PA3H5
PA2H5
PA1H5
PA0H5
5
0
5
0
5
0
5
0
PA3H4
PA2H4
PA1H4
PA0H4
0
0
0
0
4
4
4
4
Accumulators”).
PA3H3
PA2H3
PA1H3
PA0H3
0
0
0
0
3
3
3
3
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
PA3H2
PA2H2
PA1H2
PA0H2
2
0
2
0
2
0
2
0
PA3H1
PA2H1
PA1H1
PA0H1
0
0
0
0
1
1
1
1
PA3H0
PA2H0
PA1H0
PA0H0
0
0
0
0
0
0
0
0
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