UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 595

no-image

UPD70F3735GC-GAD-AX

Manufacturer Part Number
UPD70F3735GC-GAD-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3735GC-GAD-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
66
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3735GC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JF3-L
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
Remark
D
n = 0, 1
IICBSYn = 0?
MSTSn = 1?
STCFn = 0?
STTn = 1
STTn = 1
Wait
Wait
C
C
A
B
Yes
Yes
Yes
Communication reservation enabled
Communication reservation disabled
Figure 17-18. Master Operation in Multimaster System (2/3)
Wait status after stop condition
detection and start condition generation
by communication reservation function
No
No
No
Communication start preparation
(start condition generation)
Securing wait time by software
(refer to Table 17-6)
Communication start preparation
(start condition generation)
Securing wait time by software
(refer to Table 17-7)
No
EXCn = 1 or COIn =1?
EXCn = 1 or COIn =1?
interrupt occurred?
interrupt occurred?
Slave operation
INTIICn
INTIICn
No
D
Yes
Yes
Yes
Stop condition detection
Yes
No
No
Waiting for bus release
(communication reserved)
Waiting for bus release
CAPTER 17 I
Slave operation
Page 579 of 816
2
C BUS

Related parts for UPD70F3735GC-GAD-AX