UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 791

• Manufacturer Part Number: UPD70F3735GC-GAD-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3735GC-GAD-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JF3-L
Power On/Power Off/Reset Timing
(T
Note
Interrupt Timing
(T
Note
Remark T
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
EV
EV
V
RESET low-level width
RESET↓ → V
V
AV
NMI high-level width
NMI low-level width
INTPn
INTPn
A
A
DD
DD
DD
DD
REF0
= −40 to +85°C, V
= −40 to +85°C, V
↑ → RESET↑
↓ → EV
↑ → V
↑ → AV
Note
Note
↓ → EV
Depends on the on-chip regulator characteristics.
The characteristics of INTPn are the same as those of the DRST pin (P05/INTP2/DRST).
Parameter
high-level width
low-level width
RESET (input)
DD
DD
SMP
REF0
↑
↓
Parameter
DD
DD
↓
: Noise elimination sampling clock cycle
, AV
↓
AV
EV
REF0
V
REF1
DD
DD
DD
DD
↑
= EV
= E
<93>
<94>
t
t
t
t
WRSL
t
t
t
REA
RER
REL
FRE
FEL
FEA
VDD
Symbol
DD
= A
= AV
<93>
<94>
<95>
<96>
<97>
<98>
<99>
VREF0
t
t
t
t
WNIH
WNIL
WITH
WITL
REF0
Symbol
<95>
Analog noise elimination (during flash erase/writing)
Analog noise elimination
= A
= AV
VREF1
REF1
Analog noise elimination
Analog noise elimination
n = 0 to 7 (Analog noise elimination)
n = 3 (Digital noise elimination)
n = 0 to 7 (Analog noise elimination)
n = 3 (Digital noise elimination)
V
I
= 2.2 to 3.6 V, V
= 2.2 to 3.6 V, V
V
Conditions
I
Conditions
<96>
SS
CHAPTER 30 ELECTRICAL SPECIFICATIONS
SS
= EV
= EV
V
I
SS
SS
= AV
= AV
V
SS
SS
I
= 0 V, C
= 0 V, C
3T
3T
<97>
500 + t
SMP
SMP
MIN.
500
500
500
500
MIN.
+ 20
+ 20
500
500
500
L
L
0
0
0
0
= 50 pF)
REG
= 50 pF)
Note
MAX.
<98>
<99>
MAX.
t
t
REL
FEL
Page 775 of 816
Unit
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns