SAF-TC1167-128F133HL AD Infineon Technologies, SAF-TC1167-128F133HL AD Datasheet - Page 116

• Manufacturer Part Number: SAF-TC1167-128F133HL AD
• Description: IC MCU 32BIT FLASH 176-LQFP
• Manufacturer: Infineon Technologies
• Series: TC116xr

Specifications of SAF-TC1167-128F133HL AD

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 88
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 32x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFQFP
• Data Bus Width: 32 bit
• Data Ram Size: 104 KB
• Interface Type: ASC, MLI, MSC, SSC
• Maximum Clock Frequency: 133 MHz
• Number Of Programmable I/os: 88
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (12 bit, 16 Channel) / 10 bit, 4 Channel
• Packages: PG-LQFP-176
• Max Clock Frequency: 133.0 MHz
• Sram (incl. Cache): 128.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 36
• Program Memory: 1.0 MB
• For Use With: B158-H8690-X-0-7600IN - KIT STARTER TC116X SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000602800

5.3.7
The following parameters are applicable for communication through the DAP debug
interface.
Note: These parameters are not subject to production test but verified by design and/or
Table 21
Parameter
DAP0 clock period
DAP0 high time
DAP0 low time
DAP0 clock rise time
DAP0 clock fall time
DAP1 setup
to DAP0 rising edge
DAP1 hold
after DAP0 rising edge
DAP1 valid
per DAP0 clock period
1) The Host has to find a suitable sampling point by analyzing the sync telegram response.
Figure 29
Data Sheet
0.5
V
D D P
characterization.
DAP Interface Timing
DAP Interface Timing Parameters
(Operating Conditions apply)
Test Clock Timing (DAP0)
t
1 2
1)
t
Symbol
t
t
t
t
t
t
t
t
t
11
12
13
14
15
16
17
19
19
1 1
SR
SR
SR
SR
SR
SR
SR
SR
SR
t
1 3
Min.
12.5
4
4
–
–
6
6
8
10
111
Values
Typ.
–
–
–
–
–
–
–
–
–
t
1 5
Max.
–
–
–
2
2
–
–
–
–
Unit Note /
ns
ns
ns
ns
ns
ns
ns
ns
ns
Electrical Parameters
t
Test Condition
–
–
–
–
–
–
–
80 MHz,
C
40 MHz,
C
1 4
L
L
= 20 pF
= 50 pF
V1.3, 2009-10
MC_DAP0
0.9
0.1
TC1167
V
V
D D P
D D P