MC68HC705J1ACDW Freescale Semiconductor, MC68HC705J1ACDW Datasheet - Page 113

IC MCU 4MHZ 1.2K OTP 20-SOIC

MC68HC705J1ACDW

Manufacturer Part Number
MC68HC705J1ACDW
Description
IC MCU 4MHZ 1.2K OTP 20-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705J1ACDW

Core Processor
HC05
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
14
Program Memory Size
1.2KB (1.2K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705J1ACDWE
Manufacturer:
INTERSIL
Quantity:
1 000
MC68HC705J1A — Rev. 4.0
NOTE:
TOF — Timer Overflow Flag
RTIF — Real-Time Interrupt Flag
TOIE — Timer Overflow Interrupt Enable Bit
RTIE — Real-Time Interrupt Enable Bit
TOFR — Timer Overflow Flag Reset Bit
RTIFR — Real-Time Interrupt Flag Reset Bit
RT1 and RT0 — Real-Time Interrupt Select Bits
Changing RT1 and RT0 when a COP timeout is imminent can cause a
real-time interrupt request to be missed or an additional real-time
This read-only flag becomes set when the first eight stages of the
counter roll over from $FF to $00. TOF generates a timer overflow
interrupt request if TOIE is also set. Clear TOF by writing a logic 1 to
the TOFR bit. Writing to TOF has no effect. Reset clears TOF.
This read-only flag becomes set when the selected RTI output
becomes active. RTIF generates a real-time interrupt request if RTIE
is also set. Clear RTIF by writing a logic 1 to the RTIFR bit. Writing
to RTIF has no effect. Reset clears RTIF.
This read/write bit enables timer overflow interrupts. Reset clears
TOIE.
This read/write bit enables real-time interrupts. Reset clears RTIE.
Writing a logic 1 to this write-only bit clears the TOF bit. TOFR always
reads as logic 0. Reset clears TOFR.
Writing a logic 1 to this write-only bit clears the RTIF bit. RTIFR
always reads as logic 0. Reset clears RTIFR.
These read/write bits select one of four real-time interrupt rates, as
shown in
watchdog, changing the real-time interrupt rate also changes the
counting rate of the COP watchdog. Reset sets RT1 and RT0.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Timer overflow interrupts enabled
0 = Timer overflow interrupts disabled
1 = Real-time interrupts enabled
0 = Real-time interrupts disabled
Table
Multifunction Timer Module
Go to: www.freescale.com
9-1. Because the selected RTI output drives the COP
Multifunction Timer Module
Technical Data
I/O Registers

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