MC68HC16Z1CPV25 Freescale Semiconductor, MC68HC16Z1CPV25 Datasheet - Page 130

• Manufacturer Part Number: MC68HC16Z1CPV25
• Description: IC MPU 1K RAM 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CPV25

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: Q1141110

5.4 System Protection
5.4.1 Reset Status
5.4.2 Bus Monitor
5-24
The system protection block preserves reset status, monitors internal activity, and pro-
vides periodic interrupt generation.
The reset status register (RSR) latches internal MCU status during reset. Refer to
5.7.10 Reset Status Register
The internal bus monitor checks data size acknowledge (DSACK) or autovector
(AVEC) signal response times during normal bus cycles. The monitor asserts the in-
ternal bus error (BERR) signal when the response time is excessively long.
DSACK and AVEC response times are measured in clock cycles. Maximum allowable
response time can be selected by setting the bus monitor timing (BMT[1:0]) field in the
system protection control register (SYPCR).
CLOCK
2
9
PRESCALER
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 5-8 System Protection
SYSTEM INTEGRATION MODULE
SPURIOUS INTERRUPT MONITOR
Go to: www.freescale.com
MODULE CONFIGURATION
for more information.
RESET STATUS
HALT MONITOR
BUS MONITOR
AND TEST
Figure 5-8
SOFTWARE WATCHDOG TIMER
PERIODIC INTERRUPT TIMER
Table 5-8
is a block diagram of the submodule.
shows the periods allowed.
M68HC16 Z SERIES
RESET REQUEST
BERR
RESET REQUEST
IRQ[7:1]
USER’S MANUAL
SYS PROTECT BLOCK