MC68HC16Z1CPV25 Freescale Semiconductor, MC68HC16Z1CPV25 Datasheet - Page 420

• Manufacturer Part Number: MC68HC16Z1CPV25
• Description: IC MPU 1K RAM 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CPV25

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: Q1141110

D.6.10 QSPI Control Register 0
SPCR0 — QSPI Control Register 0
MSTR — Master/Slave Mode Select
D-46
RESET:
MSTR
15
0
DDQS7 determines the direction of PQS7 only when the SCI transmitter is disabled.
When the SCI transmitter is enabled, PQS7 is the TXD output.
SPCR0 contains parameters for configuring the QSPI and enabling various modes of
operation. SPCR0 must be initialized before QSPI operation begins. Writing a new val-
ue to SPCR0 while the QSPI is enabled disrupts operation.
0 = QSPI is a slave device.
1 = QSPI is the system master.
WOMQ
14
0
NOTES:
PCS0/SS
QSM Pin
PCS[1:3]
MISO
MOSI
SCK
TXD
1. PQS2 is a digital I/O pin unless the SPI is enabled (SPE set in SPCR1), in which case it
2. PQS7 is a digital I/O pin unless the SCI transmitter is enabled (TE set in SCCR1), in
RXD
becomes the QSPI serial clock SCK.
which case it becomes the SCI serial data output TXD.
13
0
2
1
Table D-34 Effect of DDRQS on QSM Pin Function
12
0
BITS[3:0]
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Freescale Semiconductor, Inc.
—
—
11
For More Information On This Product,
0
10
0
DDRQS Bit
DDQS[4:6]
Go to: www.freescale.com
DDQS0
DDQS1
DDQS2
DDQS3
DDQS7
None
REGISTER SUMMARY
CPOL
9
0
CPHA
8
1
Bit State
NA
—
—
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
7
0
6
0
Serial data output from QSPI
Serial data output from QSPI
Assertion causes mode fault
Chip-select outputs enabled
Serial data output from SCI
Disables slave select Input
Disables chip-select output
Serial data input to QSPI
Serial data input to QSPI
Clock output from QSPI
QSPI slave select input
Serial data input to SCI
Disables data output
Disables data output
5
0
Clock input to QSPI
Disables data input
Disables data input
Chip-select output
Pin Function
No effect
No effect
4
0
SPBR[7:0]
3
0
M68HC16 Z SERIES
USER’S MANUAL
2
1
$YFFC18
1
0
0
0