M30263F6AFP#U3 Renesas Electronics America, M30263F6AFP#U3 Datasheet - Page 271
![MCU 3/5V 48K I TEMP PB-FREE 42-S](/photos/28/61/286144/42-ssop_sml.jpg)
M30263F6AFP#U3
Manufacturer Part Number
M30263F6AFP#U3
Description
MCU 3/5V 48K I TEMP PB-FREE 42-S
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet
1.M30260F3AGPU5A.pdf
(354 pages)
Specifications of M30263F6AFP#U3
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
33
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M
R
R
e
E
1
. v
J
6
Table 17.8.4.1. Errors and FMR0 Register Status
NOTE:
0
C
17.8.4 Full Status Check
FMR07
2
9
(SR5)
0 .
2 /
B
(SRD register)
0
FMR0 register
1
1
0
0
6
1. The flash memory enters read array mode by writing command code ‘xxFF
2
A
When an error occurs, the FMR06 to FMR07 bits in the FMR0 register are set to “1”, indicating occur-
rence of each specific error. Therefore, execution results can be verified by checking these status bits
(full status check). Table 17.8.4.1 shows errors and the status of FMR0 register. Figure 17.8.4.1
shows a flow chart of the full status check and handling procedure for each error.
0
F
cycle of these commands. The command code written in the first bus cycle becomes invalid.
2
e
G
0 -
status
b
o r
1 .
2
0
u
, 5
0
FMR06
p
(SR4)
2
(
0
M
1
0
1
0
1
7
6
C
page 252
2 /
Command
sequence error • A value other than ‘xxD0
Erase error
Program error
6
, A
M
Error
1
f o
6
C
3
2
2 /
9
6
, B
M
• When any commands are not written correctly
• When the block erase command is executed on protected blocks
• When the program command is executed on protected blocks
• When the block erase command is executed on unprotected
• When the program command is executed on unprotected blocks
bus cycle of the block erase command
blocks but the blocks are not automatically erased correctly
but the blocks are not automatically programmed correctly.
1
6
C
2 /
6
) T
Error occurrence condition
16
’ or ‘xxFF
16
(1)
’ is written in the second
16
17. Flash Memory Version
’ in the second bus
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