M30263F6AFP#U3 Renesas Electronics America, M30263F6AFP#U3 Datasheet - Page 38
![MCU 3/5V 48K I TEMP PB-FREE 42-S](/photos/28/61/286144/42-ssop_sml.jpg)
M30263F6AFP#U3
Manufacturer Part Number
M30263F6AFP#U3
Description
MCU 3/5V 48K I TEMP PB-FREE 42-S
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet
1.M30260F3AGPU5A.pdf
(354 pages)
Specifications of M30263F6AFP#U3
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
33
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M
R
R
3. Memory
e
E
1
. v
J
Figure 3.1 Memory Map
6
0
Figure 3.1 is a memory map of the M16C/26A Group (M16C/26A, M16C/26B, M16C/26T). The M16C/26A
Group provides 1-Mbyte address space addresses 00000
The internal ROM is allocated lower address, beginning with address FFFFF
internal ROM area is allocated in addresses F0000
of 2-Kbyte internal ROM area, block A and block B, for data space. These blocks are allocated addresses
F000
The fixed interrupt vectors are allocated addresses FFFDC
of each interrupt routine.
The internal RAM is allocated higher addresses, beginning with address 00400
internal RAM area is allocated in addresses 00400
storing data. The area is also used as stacks when subroutines are called or interrupt requests are ac-
knowledged.
The SFR is allocated addresses 00000
cated here. All blank spaces within SFR location are reserved and cannot be accessed by users.
The special page vectors are allocated addresses FFE00
instruction and JSRS instruction. Refer to the Renesas publication M16C/60 and M16C/20 Series Soft-
ware Manual for details.
C
2
9
2 /
0 .
B
0
0
6
2
A
16
NOTE:
0
F
2
1K bytes
2K bytes
e
G
Size
1. Block A (2 Kbytes) and block B (2 Kbytes).
2. Do not write to the internal ROM in Mask ROM version.
0 -
to FFFF
b
o r
1 .
2
Internal RAM
0
u
, 5
0
p
Address XXXXX
2
(
0
M
007FF
00BFF
0
16
1
7
6
.
16
16
C
page 19
16
2 /
6
, A
24K bytes
48K bytes
64K bytes
Size
M
Internal ROM
1
f o
6
Address YYYYY
C
3
FA000
F4000
F0000
2 /
2
9
6
16
16
16
, B
16
M
16
1
6
XXXXX
YYYYY
0FFFF
FFFFF
0F000
to 003FF
00000
00400
C
2 /
16
16
16
16
16
16
16
6
) T
(Program space)
16
16
Internal ROM
16
Internal ROM
(Data space)
Internal RAM
to 007FF
Reserved
Reserved
to FFFFF
. The peripheral function control registers are allo-
SFR
16
16
16
(1)
(2)
to FFFFF
to FFFFF
16
to FFFDB
16
. The internal RAM is used for temporarily
. The flash memory version has two sets
16
16
.
16
and they store the start address
FFE00
FFFDC
FFFFF
. They are used for the JMPS
16
16
16
16
16
. For example, a 64-Kbyte
. For example, a 1-Kbyte
Undefined instruction
BRK instruction
Special page
Watchdog timer
Address match
vector table
Single step
Overflow
Reset
DBC
NMI
3. Memory
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