MCF5216CVF66 Freescale Semiconductor, MCF5216CVF66 Datasheet - Page 578

• Manufacturer Part Number: MCF5216CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5216CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• Ram Memory Size: 64KB
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Operating Temperature Range: -40°C To +85°C
• No. Of Pins: 256
• Rohs Compliant: No
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Queued Analog-to-Digital Converter (QADC)
The remaining situations, S6 through S11, show the impact of a queue 1 trigger event occurring during
queue 2 execution. Because queue 1 has higher priority, the conversion taking place in queue 2 is aborted
so that there is no variable latency time in responding to queue 1 trigger events.
In situation 6
the conversion is complete, so that queue 1 execution can begin. Queue 2 is considered suspended. After
queue 1 is finished, queue 2 starts over with the first CCW, when the RESUME control bit is set to 0.
Situation S7
works the same way.
28-40
Q1:
Q2:
QS
Q1:
Q2:
QS:
(Figure
(Figure
IDLE
0000
IDLE
28-29) shows that when pause operation is not used with queue 2, queue 2 suspension
0000
28-28), the conversion initiated by the second CCW in queue 2 is aborted just before
IDLE
IDLE
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Q1:
Q1:
T1
Q2:
T1
Figure 28-27. CCW Priority Situation 5
Figure 28-28. CCW Priority Situation 6
1000
C1
ACTIVE
C1
ACTIVE
1000
T2
TOR2
C2
TRIG
1011
C2
T2
PF1
PF1
0100
Q2:
C1
ACTIVE
T2
0110
PAUSE
PAUSE
C1
C2
ACTIVE
0110
PF2
C2
0101 1001 1011
PAUSE
T1
T1
C3
SUSPEND
ACTIVE
ACTIVE
C3
ACTIVE
ACTIVE
1010
T2
TOR2
C4
TRIG
C4
T2
CF1
CF1
C1
C3
ACTIVE
0010
C2
ACTIVE
C4
RESUME = 0
0010
CF2
C3
IDLE
IDLE
Freescale Semiconductor
C4
IDLE
0000
CF2
IDLE
0000