XR17V354IB176-F Exar Corporation, XR17V354IB176-F Datasheet - Page 20

IC UART PCIE 256B DUAL 176FPBGA

XR17V354IB176-F

Manufacturer Part Number
XR17V354IB176-F
Description
IC UART PCIE 256B DUAL 176FPBGA
Manufacturer
Exar Corporation
Datasheet

Specifications of XR17V354IB176-F

Number Of Channels
4, QUART
Package / Case
176-LFBGA
Features
*
Fifo's
256 Byte
Protocol
RS485
Voltage - Supply
3.3V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
25 Mbps
Supply Current
120 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
No. Of Channels
4
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
BGA
No. Of Pins
176
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XR17V354IB176-F
Manufacturer:
EXAR
Quantity:
500
Part Number:
XR17V354IB176-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XR17V354IB176-F
Manufacturer:
EXAR/艾科嘉
Quantity:
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XR17V354
HIGH PERFORMANCE QUAD PCI-EXPRESS UART
REGA [15:8] Register
Reserved.
TIMERCNTL [7:0] Register
The bits [3:0] of this register are used to issue commands. The commands are self-clearing, so reading this
register does not show the last written command. Reading this register returns a value of 0x01 when the Timer
interrupt is enabled and there is a pending Timer interrupt. It returns a value of 0x00 at all other times. The
default settings of the Timer, upon power-up, a hardware reset or upon the issue of a ’Timer Reset’ command
are:
TIMERCNTL [7:4]
TIMERCNTL [3:0]
Bit-15 Bit-14 Bit-13 Bit-12 Bit-11 Bit-10
Timer Interrupt Disabled
Re-triggerable mode selected
Internal 125MHz clock (master) or 62.5MHz clock (slave) selected as clock source
Timer output not routed to MPIO[0]
Timer stopped
TIMERMSB Register
Reserved
These bits are used to invoke a series of commands that control the function of the Timer/Counter.
The commands 1100 to 1111 are reserved.
0001: Enable Timer Interrupt
0010: Disable Timer Interrupt
0011: Select One-shot mode
0100: Select Re-triggerable mode
0101: Select Internal 125MHz clock (master) or 62.5MHz clock (slave) as clock input for the Timer
0110: Select External Clock input through the TMRCK pin for the Timer
0111: Route Timer output to MPIO[0] pin
1000: De-route Timer output from MPIO[0]
1001: Start Timer
1010: Stop Timer
1011: Reset Timer
16-Bit Timer/Counter Programmable Registers
T
ABLE
9: TIMER CONTROL R
Bit-9 Bit-8
20
Bit-7
Bit-6
EGISTERS
Bit-5
TIMERLSB Register
Bit-4
Bit-3
Bit-2
Bit-1 Bit-0
REV. 1.0.1

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