XR17V354IB176-F Exar Corporation, XR17V354IB176-F Datasheet - Page 21

IC UART PCIE 256B DUAL 176FPBGA

XR17V354IB176-F

Manufacturer Part Number
XR17V354IB176-F
Description
IC UART PCIE 256B DUAL 176FPBGA
Manufacturer
Exar Corporation
Datasheet

Specifications of XR17V354IB176-F

Number Of Channels
4, QUART
Package / Case
176-LFBGA
Features
*
Fifo's
256 Byte
Protocol
RS485
Voltage - Supply
3.3V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
25 Mbps
Supply Current
120 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
No. Of Channels
4
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
BGA
No. Of Pins
176
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XR17V354IB176-F
Manufacturer:
EXAR
Quantity:
500
Part Number:
XR17V354IB176-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XR17V354IB176-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
REV. 1.0.1
TIMER OPERATION
The following paragraphs describe the operation of the 16-bit Timer/Counter. The following conventions will be
used in this discussion:
Timer Operation in One-Shot Mode:
In the one-shot mode, the Timer output will stay HIGH when started (default state) and will continue to stay
HIGH until it times out (reaches the terminal count of ‘N’ clocks), at which time it will become LOW and stay
LOW. If the Timer is re-started before the Timer times out, the counter is reset and the Timer will wait for
another time-out period before setting its output LOW (See
Timer does not have any effect and a ’Stop Timer’ command needs to be issued first which will set the Timer
output to its default HIGH state. The Timer must be programmed while it is stopped since the following
operations are blocked after the Timer has been started:
Timer Operation in Re-triggerable Mode:
In the re-triggerable mode, when the Timer is started, the Timer output will stay HIGH until it reaches half of the
terminal count N (= P clocks) and toggle LOW and stay LOW for a similar amount of time (Q clocks). The
above step will keep repeating until the Timer is stopped at which time the output will become HIGH (default
state). See
triggerable mode. The Timer must be programmed while it is stopped since the following operations are
blocked when the Timer is running:
Routing the Timer Output to MPIO[0] Pin:
MPIO[0] pin is by default (on power up or reset, for example) an input. However, whenever the Timer output is
routed to MPIO[0] pin,
’N’ is the 16-bit value programmed in the TIMER MSB, LSB registers
P +Q = N, where ’P’ and ’Q’ are approximately half of ’N’.
If N is even, P = Q = N/2.
If N is odd, P = (N – 1)/2 and Q = (N + 1)/2.
‘N’ can take any value from 0x0002 to 0xFFFF.
Any write to TIMER MSB, LSB registers
Issue of any command other than ’Start Timer’, ’Stop Timer’ and ’Reset Timer’
Any write to TIMER MSB, LSB registers
Issue of any command other than ’Stop Timer’ and ’Reset Timer’ (’Start Timer’ is not allowed)
MPIO[0] will be automatically selected as an output
MPIO[0] will become HIGH (the default state of Timer output)
All MPIO control registers (MPIOLVL, MPIOSEL etc) lose control over MPIO[0] and get the control back
only when the Timer output is de-routed from MPIO[0].
Figure
6. Also, after the Timer is started, re-starting the Timer does not have any effect in re-
21
HIGH PERFORMANCE QUAD PCI-EXPRESS UART
Figure
6). If the Timer times out, re-starting the
XR17V354

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