XR17V354IB176-F Exar Corporation, XR17V354IB176-F Datasheet - Page 59

• Manufacturer Part Number: XR17V354IB176-F
• Description: IC UART PCIE 256B DUAL 176FPBGA
• Manufacturer: Exar Corporation

Specifications of XR17V354IB176-F

• Number Of Channels: 4, QUART
• Package / Case: 176-LFBGA
• Features: *
• Fifo's: 256 Byte
• Protocol: RS485
• Voltage - Supply: 3.3V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 25 Mbps
• Supply Current: 120 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• No. Of Channels: 4
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: BGA
• No. Of Pins: 176
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REV. 1.0.1
FCTR[5]: Auto RS485 Enable
Auto RS485 half duplex control enable/disable. RTS# or DTR# can be selected as the control output via MCR
bit-2.
Therefore, the Auto RTS/DTR flow control feature will not have any effect when the Auto RS485 Half-Duplex
Direction Control feature is enabled.
•
•
FCTR[4]: Infrared RX Input Logic Select
•
•
FCTR [3:0] - Auto RTS/DTR Flow Control Hysteresis Select
These bits select the auto RTS/DTR flow control hysteresis and only valid when TX and RX Trigger Table-D is
selected (FCTR bit [7:6] are set to logic 1). The RTS/DTR hysteresis is referenced to the RX FIFO trigger level.
After reset, these bits are set to logic 0 selecting the next FIFO trigger level for hardware flow control.
below shows the 16 selectable hysteresis levels.
Logic 0 = Standard ST16C550 mode. Transmitter generates an interrupt when transmit holding register
(THR) becomes empty. Transmit Shift Register (TSR) may still be shifting data bit out.
Logic 1 = Enable Auto RS485 half duplex direction control. RTS#/DTR# output changes from HIGH to LOW
when finished sending the last stop bit of the last character out of the TSR register. It changes from LOW to
HIGH when a data byte is loaded into the THR or transmit FIFO. The change to HIGH occurs prior sending
the start-bit. It also changes the transmitter interrupt from transmit holding to transmit shift register (TSR)
empty. If software flow control is enabled, the RTS#/DTR# output will not change if the TX FIFO is empty
and the RX FIFO level generates an XON or XOFF character to be transmitted.
Logic 0 = Select RX input as active HIGH encoded IrDA data, normal, (default).
Logic 1 = Select RX input as active LOW encoded IrDA data, inverted.
Note that this feature has precedence over the Auto RTS/DTR flow control feature (EFR bit-6).
FCTR B
T
ABLE
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
IT
[3]
19: 16 S
FCTR B
ELECTABLE
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
IT
[2]
H
YSTERESIS
FCTR B
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
IT
L
[1]
EVELS
59
HIGH PERFORMANCE QUAD PCI-EXPRESS UART
W
FCTR B
HEN
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
T
RIGGER
IT
[0]
T
ABLE
RTS/DTR H
-D
(
CHARACTERS
IS
S
+/- 16
+/- 24
+/- 32
+/- 12
+/- 20
+/- 28
+/- 36
+/- 40
+/- 44
+/- 48
+/- 52
+/- 4
+/- 6
+/- 8
+/- 8
ELECTED
0
YSTERESIS
XR17V354
)
Table 19