XQ2V1000-4BG575N Xilinx Inc, XQ2V1000-4BG575N Datasheet - Page 26

• Manufacturer Part Number: XQ2V1000-4BG575N
• Description: FPGA 650MHZ CMOS1.5V 575-P
• Manufacturer: Xilinx Inc
• Series: QPro™ Virtex™-IIr

Specifications of XQ2V1000-4BG575N

• Number Of Labs/clbs: 1280
• Total Ram Bits: 737280
• Number Of I /o: 328
• Number Of Gates: 100000
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -55°C ~ 125°C
• Package / Case: 575-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -
• Other names: Q5801737

Sum of Products
Each Virtex-II slice has a dedicated OR gate named ORCY,
ORing together outputs from the slices carryout and the ORCY
from an adjacent slice. The ORCY gate with the dedicated
Sum of Products (SOP) chain are designed for implementing
large, flexible SOP chains. One input of each ORCY is
connected through the fast SOP chain to the output of the
previous ORCY in the same slice row. The second input is
X-Ref Target - Figure 26
X-Ref Target - Figure 27
DS122 (v2.0) December 21, 2007
Product Specification
4
4
4
4
R
LUT
LUT
LUT
LUT
4
4
4
4
MUXCY
MUXCY
MUXCY
MUXCY
ORCY
Slice 1
Slice 0
V
CC
4
4
4
4
LUT
LUT
LUT
LUT
Figure 27: Wide-Input AND Gate (16 Inputs)
LUT
LUT
LUT
LUT
Figure 26: Horizontal Cascade Chain
MUXCY
MUXCY
MUXCY
MUXCY
ORCY
Slice 2
Slice 3
V
CC
“0”
“0”
“0”
CLB
0
0
0
0
MUXCY
MUXCY
MUXCY
MUXCY
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V CC
1
1
1
1
4
4
4
4
Slice
Slice
connected to the output of the top MUXCY in the same slice,
as shown in
LUTs and MUXCYs can implement large AND gates or other
combinatorial logic functions.
MUXCY resources configured as a 16-input AND gate.
LUT
LUT
LUT
LUT
OUT
MUXCY
MUXCY
MUXCY
MUXCY
Figure
ORCY
Slice 0
Slice 1
V
CC
26.
QPro Virtex-II 1.5V Platform FPGAs
16
4
4
4
4
LUT
LUT
LUT
LUT
AND
Figure 27
DS031_41_110600
MUXCY
MUXCY
MUXCY
MUXCY
OUT
ORCY
Slice 3
Slice 2
V
CC
illustrates LUT and
CLB
ds031_64_110300
SOP
26