AGL030V2-CSG81 Actel, AGL030V2-CSG81 Datasheet - Page 79

• Manufacturer Part Number: AGL030V2-CSG81
• Description: FPGA - Field Programmable Gate Array 30K System Gates IGLOO
• Manufacturer: Actel

Specifications of AGL030V2-CSG81

• Processor Series: AGL030
• Core: IP Core
• Maximum Operating Frequency: 526.32 MHz, 892.86 MHz
• Number Of Programmable I/os: 66
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 30 K
• Package / Case: CSP-81
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-101 • 1.8 V LVCMOS High Slew – Applies to 1.5 V DC Core Voltage
Table 2-102 • 1.8 V LVCMOS Low Slew – Applies to 1.5 V DC Core Voltage
Table 2-103 • 1.8 V LVCMOS High Slew – Applies to 1.5 V DC Core Voltage
Drive Strength
2 mA
4 mA
6 mA
8 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
Drive Strength
2 mA
4 mA
Note:
Drive Strength
2 mA
4 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
Commercial-Case Conditions: T
Applicable to Standard Plus Banks
Commercial-Case Conditions: T
Applicable to Standard Banks
Commercial-Case Conditions: T
Applicable to Standard Banks
Speed Grade t
Speed Grade
Speed Grade
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
DOUT
0.97
0.97
0.97
0.97
t
DOUT
0.97
0.97
t
DOUT
2.62
2.18
2.76 0.18 1.01
2.25 0.18 1.01
1.97 0.18 1.01
1.97 0.18 1.01
t
DP
J
J
J
5.63
4.69
t
t
0.18
0.18
DP
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.7 V
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.7 V
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.7 V
DIN
t
DP
t
0.18
0.18
t
PY
0.98
0.98
R ev i si o n 1 8
DIN
t
DIN
t
EOUT
0.66
0.66
0.66
0.66
0.98
0.98
t
0.66
0.66
PY
t
PY
Table 2-6 on page 2-7
Table 2-6 on page 2-7
2.79 2.76 1.94 1.51
2.30 2.09 2.24 2.29
2.02 1.76 2.46 2.66
2.02 1.76 2.46 2.66
t
t
ZL
EOUT
0.66
0.66
t
2.67
2.22
EOUT
Table 2-6 on page 2-7
t
ZH
5.74
4.79
t
2.59
1.93
ZL
t
ZL
t
LZ
1.67
1.97
5.30
4.52
t
t
IGLOO Low Power Flash FPGAs
ZH
t
ZH
for derating values.
for derating values.
HZ
1.29
2.06
6.39
5.89
5.61
5.61
t
1.68
1.97
t
ZLS
t
LZ
for derating values.
LZ
2.62
2.18
1.24
1.98
t
6.35
5.69
5.36
5.36
t
t
HZ
ZHS
HZ
Units
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
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