DP83848VYB National Semiconductor, DP83848VYB Datasheet - Page 3

• Manufacturer Part Number: DP83848VYB
• Description: TRANSCEIVER, ENET PHY, 10/100, 48LQFP
• Manufacturer: National Semiconductor

Specifications of DP83848VYB

• Data Rate: 100Mbps
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 92mA
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +105°C
• Digital Ic Case Style: LQFP
• No.: RoHS Compliant
• Interface Type: MII Serial, RMII
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Not Compliant

General Description .............................................................................................................................. 1
Applications ......................................................................................................................................... 1
Features .............................................................................................................................................. 1
System Diagram ................................................................................................................................... 1
Block Diagram ...................................................................................................................................... 2
Pin Layout ........................................................................................................................................... 6
1.0 Pin Descriptions .............................................................................................................................. 7
2.0 Configuration ................................................................................................................................ 13
3.0 Functional Description .................................................................................................................... 17
4.0 Architecture .................................................................................................................................. 20
1.1 SERIAL MANAGEMENT INTERFACE ............................................................................................. 7
1.2 MAC DATA INTERFACE ................................................................................................................ 7
1.3 CLOCK INTERFACE ..................................................................................................................... 8
1.4 LED INTERFACE .......................................................................................................................... 9
1.5 JTAG INTERFACE ........................................................................................................................ 9
1.6 RESET AND POWER DOWN ......................................................................................................... 9
1.7 STRAP OPTIONS ....................................................................................................................... 10
1.8 10 Mb/s AND 100 Mb/s PMD INTERFACE ...................................................................................... 11
1.9 SPECIAL CONNECTIONS ........................................................................................................... 11
1.10 POWER SUPPLY PINS ............................................................................................................. 11
1.11 PACKAGE PIN ASSIGNMENTS .................................................................................................. 12
2.1 AUTO-NEGOTIATION ................................................................................................................. 13
2.2 AUTO-MDIX ............................................................................................................................... 14
2.3 PHY ADDRESS .......................................................................................................................... 14
2.4 LED INTERFACE ........................................................................................................................ 15
2.5 HALF DUPLEX vs. FULL DUPLEX ................................................................................................ 16
2.6 INTERNAL LOOPBACK ............................................................................................................... 16
2.7 BIST .......................................................................................................................................... 16
3.1 MII INTERFACE .......................................................................................................................... 17
3.2 REDUCED MII INTERFACE ......................................................................................................... 17
3.3 10 Mb SERIAL NETWORK INTERFACE (SNI) ................................................................................ 18
3.4 802.3u MII SERIAL MANAGEMENT INTERFACE ........................................................................... 18
4.1 100BASE-TX TRANSMITTER ....................................................................................................... 20
4.2 100BASE-TX RECEIVER ............................................................................................................. 22
2.1.1 Auto-Negotiation Pin Control .................................................................................................... 13
2.1.2 Auto-Negotiation Register Control ............................................................................................. 13
2.1.3 Auto-Negotiation Parallel Detection ........................................................................................... 13
2.1.4 Auto-Negotiation Restart .......................................................................................................... 14
2.1.5 Enabling Auto-Negotiation via Software ..................................................................................... 14
2.1.6 Auto-Negotiation Complete Time .............................................................................................. 14
2.3.1 MII Isolate Mode ..................................................................................................................... 14
2.4.1 LEDs ..................................................................................................................................... 15
2.4.2 LED Direct Control .................................................................................................................. 16
3.1.1 Nibble-wide MII Data Interface .................................................................................................. 17
3.1.2 Collision Detect ...................................................................................................................... 17
3.1.3 Carrier Sense ......................................................................................................................... 17
3.4.1 Serial Management Register Access ......................................................................................... 18
3.4.2 Serial Management Access Protocol ......................................................................................... 18
3.4.3 Serial Management Preamble Suppression ................................................................................ 19
4.1.1 Code-group Encoding and Injection ........................................................................................... 21
4.1.2 Scrambler .............................................................................................................................. 21
4.1.3 NRZ to NRZI Encoder ............................................................................................................. 22
4.1.4 Binary to MLT-3 Convertor ....................................................................................................... 22
4.2.1 Analog Front End .................................................................................................................... 22
4.2.2 Digital Signal Processor ........................................................................................................... 22
4.2.3 Signal Detect ......................................................................................................................... 25
4.2.4 MLT-3 to NRZI Decoder ........................................................................................................... 25
4.2.5 NRZI to NRZ .......................................................................................................................... 25
4.2.6 Serial to Parallel ..................................................................................................................... 25
4.2.7 Descrambler .......................................................................................................................... 25
4.2.8 Code-group Alignment ............................................................................................................. 25
4.2.9 4B/5B Decoder ....................................................................................................................... 25
4.2.2.1 Digital Adaptive Equalization and Gain Control ....................................................................... 23
4.2.2.2 Base Line Wander Compensation ........................................................................................ 24
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