DP83848VYB National Semiconductor, DP83848VYB Datasheet - Page 48

TRANSCEIVER, ENET PHY, 10/100, 48LQFP

DP83848VYB

Manufacturer Part Number
DP83848VYB
Description
TRANSCEIVER, ENET PHY, 10/100, 48LQFP
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83848VYB

Data Rate
100Mbps
No. Of Ports
1
Ethernet Type
IEEE 802.3u
Supply Current
92mA
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +105°C
Digital Ic Case Style
LQFP
No.
RoHS Compliant
Interface Type
MII Serial, RMII
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Not Compliant

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Quantity
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NS
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Manufacturer:
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Quantity:
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15:13
Bit
7.2.6 100 Mb/s PCS Configuration and Status Register (PCSR)
This register contains control and status information for the 100BASE Physical Coding Sublayer.
7.2.7 RMII and Bypass Register (RBR)
This register configures the RMII Mode of operation. When RMII mode is disabled, the RMII functionality is bypassed.
5
4
Bit
12
11
10
9
8
7
6
5
4
3
2
1
0
FORCE_100_OK
SD FORCE PMA
NRZI_BYPASS
RMII_REV1_0
RMII_MODE
SD_OPTION
RESERVED
DESC_TIME
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
FREE_CLK
Bit Name
Bit Name
TQ_EN
TABLE 26. 100 Mb/s PCS Configuration and Status Register (PCSR), address 0x16h
TABLE 27. RMII and Bypass Register (RBR), addresses 0x17h
<00>, RO
Strap, RW
Default
0, RW
0, RW
0, RW
1, RW
0, RW
0, RW
0, RW
Default
0, RW
0, RO
0
0
0
0
0
0
RESERVED: Writes ignored, read as 0.
RESERVED:Must be zero.
Receive Clock:
100Mbs True Quiet Mode Enable:
1 = Transmit True Quiet Mode.
0 = Normal Transmit Mode.
Signal Detect Force PMA:
1 = Forces Signal Detection in PMA.
0 = Normal SD operation.
Signal Detect Option:
1 = Default operation. Link will be asserted following detection of valid signal level
and Descrambler Lock. Link will be maintained as long as signal level is valid. A
loss of Descrambler Lock will not cause Link Status to drop.
0 = Modified signal detect algorithm. Link will be asserted following detection of
valid signal level and Descrambler Lock. Link will be maintained as long as signal
level is valid and Descrambler remains locked.
Descrambler Timeout:
Increase the descrambler timeout. When set this should allow the device to
receive larger packets (>9k bytes) without loss of synchronization.
1 = 2ms.
0 = 722us (per ANSI X3.263: 1995 (TP-PMD) 7.2.3.3e).
RESERVED: Must be zero.
Force 100 Mb/s Good Link:
1 = Forces 100 Mb/s Good Link.
0 = Normal 100 Mb/s operation.
RESERVED:Must be zero.
RESERVED:Must be zero.
NRZI Bypass Enable:
1 = NRZI Bypass Enabled.
0 = NRZI Bypass Disabled.
RESERVED:Must be zero.
RESERVED:Must be zero.
RESERVED: Writes ignored, read as 0.
Reduced MII Mode:
0 = Standard MII Mode.
1 = Reduced MII Mode.
Reduced MII Revision 1.0:
0 = (RMII revision 1.2) CRS_DV will toggle at the end of a packet to indicate
deassertion of CRS.
1 = (RMII revision 1.0) CRS_DV will remain asserted until final data is transferred.
CRS_DV will not toggle at the end of a packet.
48
Description
Description

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