DP83848VYB National Semiconductor, DP83848VYB Datasheet - Page 46

TRANSCEIVER, ENET PHY, 10/100, 48LQFP

DP83848VYB

Manufacturer Part Number
DP83848VYB
Description
TRANSCEIVER, ENET PHY, 10/100, 48LQFP
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83848VYB

Data Rate
100Mbps
No. Of Ports
1
Ethernet Type
IEEE 802.3u
Supply Current
92mA
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +105°C
Digital Ic Case Style
LQFP
No.
RoHS Compliant
Interface Type
MII Serial, RMII
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Not Compliant

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Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
7.2.3 MII Interrupt Status and Misc. Control Register (MISR)
This register contains event status and enables for the interrupt function. If an event has occurred since the last read of this register,
the corresponding status bit will be set. If the corresponding enable bit in the register is set, an interrupt will be generated if the
event occurs. The MICR register controls must also be set to allow interrupts. The status indications in this register will be set even
if the interrupt is not enabled.
LINK_INT_EN
DUP_INT_EN
ANC_INT_EN
SPD_INT_EN
RHF_INT_EN
FHF_INT_EN
ED_INT_EN
Bit Name
Reserved
LINK_INT
DUP_INT
ANC_INT
Reserved
SPD_INT
RHF_INT
FHF_INT
ED_INT
TABLE 23. MII Interrupt Status and Misc. Control Register (MISR), address 0x12h
0, RO/COR
0, RO/COR
0, RO/COR
0, RO/COR
0, RO/COR
0, RO/COR
0, RO/COR
0, RO/COR
Default
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
Link Quality interrupt:
1 = Link Quality interrupt is pending and is cleared by the current read.
0 = No Link Quality interrupt pending.
Energy Detect interrupt:
1 = Energy detect interrupt is pending and is cleared by the current read.
0 = No energy detect interrupt pending.
Change of Link Status interrupt:
1 = Change of link status interrupt is pending and is cleared by the current read.
0 = No change of link status interrupt pending.
Change of speed status interrupt:
1 = Speed status change interrupt is pending and is cleared by the current read.
0 = No speed status change interrupt pending.
Change of duplex status interrupt:
1 = Duplex status change interrupt is pending and is cleared by the current read.
0 = No duplex status change interrupt pending.
Auto-Negotiation Complete interrupt:
1 = Auto-negotiation complete interrupt is pending and is cleared by the current
read.
0 = No Auto-negotiation complete interrupt pending.
False Carrier Counter half-full interrupt:
1 = False carrier counter half-full interrupt is pending and is cleared by the current
read.
0 = No false carrier counter half-full interrupt pending.
Receive Error Counter half-full interrupt:
1 = Receive error counter half-full interrupt is pending and is cleared by the current
read.
0 = No receive error carrier counter half-full interrupt pending.
Enable Interrupt on Link Quality Monitor event.
Enable Interrupt on energy detect event.
Enable Interrupt on change of link status.
Enable Interrupt on change of speed status.
Enable Interrupt on change of duplex status.
Enable Interrupt on Auto-negotiation complete event.
Enable Interrupt on False Carrier Counter Register half-full event.
Enable Interrupt on Receive Error Counter Register half-full event.
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Description

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