DP83848VYB National Semiconductor, DP83848VYB Datasheet - Page 53

• Manufacturer Part Number: DP83848VYB
• Description: TRANSCEIVER, ENET PHY, 10/100, 48LQFP
• Manufacturer: National Semiconductor

Specifications of DP83848VYB

• Data Rate: 100Mbps
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 92mA
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +105°C
• Digital Ic Case Style: LQFP
• No.: RoHS Compliant
• Interface Type: MII Serial, RMII
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Not Compliant

15:8
Bit
15
14
13
7:6
1:0
Bit
7.2.11 CD Test and BIST Extensions Register (CDCTRL1)
This register controls test modes for the 10BASE-T Common Driver. In addition it contains extended control and status for the
packet BIST function.
7.2.12 Energy Detect Control (EDCR)
This register provides control and status for the Energy Detect function.
5
4
3
2
BIST_ERROR_COUNT
BIST_CONT_MODE
10MEG_PATT_GAP
ED_AUTO_DOWN
CDPATTSEL[1:0]
ED_AUTO_UP
CDPATTEN_10
RESERVED
RESERVED
Bit Name
Bit Name
ED_EN
TABLE 31. CD Test and BIST Extensions Register (CDCTRL1), address 0x1Bh
TABLE 32. Energy Detect Control (EDCR), address 0x1Dh
Default
Default
0, RW
1, RW
1, RW
00, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RO
Energy Detect Enable:
Allow Energy Detect Mode.
When Energy Detect is enabled and Auto-Negotiation is disabled via
the BMCR register, Auto-MDIX should be disabled via the PHYCR
register.
Energy Detect Automatic Power Up:
Automatically begin power up sequence when Energy Detect Data
Threshold value (EDCR[3:0]) is reached. Alternatively, device could be
powered up manually using the ED_MAN bit (ECDR[12]).
Energy Detect Automatic Power Down:
Automatically begin power down sequence when no energy is detected.
Alternatively, device could be powered down using the ED_MAN bit
(EDCR[12]).
BIST ERROR Counter:
Counts number of errored data nibbles during Packet BIST. This value
will reset when Packet BIST is restarted. The counter sticks when it
reaches its max count.
RESERVED: Must be zero.
Packet BIST Continuous Mode:
Allows continuous pseudo random data transmission without any break
in transmission. This can be used for transmit VOD testing. This is used
in conjunction with the BIST controls in the PHYCR Register (19h). For
10Mb operation, jabber function must be disabled, bit 0 of the
10BTSCR (1Ah), JABBER_DIS = 1.
CD Pattern Enable for 10Mb:
1 = Enabled.
0 = Disabled.
RESERVED: Must be zero.
Defines gap between data or NLP test sequences:
1 = 15 µs.
0 = 10 µs.
CD Pattern Select[1:0]:
If CDPATTEN_10 = 1:
00 = Data, EOP0 sequence.
01 = Data, EOP1 sequence.
10 = NLPs.
11 = Constant Manchester 1s (10 MHz sine wave) for harmonic
distortion testing.
53
Description
Description
www.national.com