M52S128168A-7.5BG ELITE SEMICONDUCTOR, M52S128168A-7.5BG Datasheet - Page 2

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M52S128168A-7.5BG

Manufacturer Part Number
M52S128168A-7.5BG
Description
DRAM IC
Manufacturer
ELITE SEMICONDUCTOR
Datasheet

Specifications of M52S128168A-7.5BG

Ic Interface Type
Parallel
Frequency
133MHz
Termination Type
SMD
Supply Voltage Max
2.7V
Memory Voltage, Vcc
2.5 V
Interface Type
Parallel
Memory Size
128Mbit
Supply Voltage Min
2.3V
Operating Temperature Min
0��C
Filter Terminals
SMD
Rohs Compliant
Yes
Operating Temperature Max
70°C
Page Size
128MB
Memory Case Style
FBGA
No. Of Pins
54
Operating Temperature Range
0°C To +70°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ESMT
Mobile SDRAM
FEATURES
GENERAL DESCRIPTION
by 16 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on
every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same
device to be useful for a variety of high bandwidth, high performance memory system applications.
PIN ASSIGNMENT (Top View)
Elite Semiconductor Memory Technology Inc.
- CAS Latency (2 & 3)
- Burst Length (1, 2, 4, 8 & full page)
- Burst Type (Sequential & Interleave)
- PASR (Partial Array Self Refresh)
- TCSR (Temperature Compensated Self Refresh)
- DS (Driver Strength)
2.5V power supply
LVTTL compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
EMRS cycle with address
All inputs are sampled at the positive going edge of the
system clock
Special function support
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle)
The M52S128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words
A
LDQM
10
V
V
V
V
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CAS
RAS
BA0
BA1
V
DDQ
V
V
DDQ
SSQ
SSQ
WE
/AP
CS
DD
DD
A
A
A
A
DD
0
1
2
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
V
DQ15
V
DQ14
DQ13
V
DQ12
DQ11
V
DQ10
DQ9
V
DQ8
V
NC
UDQM
CLK
CKE
NC
A
A
A
A
A
A
A
V
SS
SSQ
DDQ
SSQ
DDQ
SS
11
9
8
7
6
5
4
SS
A
B
C
D
E
F
G
H
J
UDQM
DQ12
VSS
DQ14
DQ10
DQ8
VSS
NC
A8
1
ORDERING INFORMATION
M52S128168A-7TG
M52S128168A-7BG
M52S128168A-7.5TG 133MHz
M52S128168A-7.5BG 133MHz
M52S128168A-10TG
M52S128168A-10BG
DQ15
DQ13
DQ11
DQ9
CLK
NC
A11
A5
A7
2
PRODUCT NO.
VSSQ
VDDQ
VSSQ
VDDQ
VSS
CKE
A9
A6
3
A4
4
5
Synchronous DRAM
2M x 16 Bit x 4 Banks
6
143MHz
143MHz
100MHz
100MHz
Publication Date: Oct. 2007
FREQ.
Revision: 1.1
MAX
VDDQ
VSSQ
VDDQ
VSSQ
VDD
CAS
BA0
7
A0
A3
M52S128168A
LDQM
DQ0
DQ2
DQ4
DQ6
RAS
BA1
54 Ball FBGA
54 Ball FBGA
54 Ball FBGA
A1
A2
8
PACKAGE
54 TSOP II
54 TSOP II
54 TSOP II
VDD
DQ1
DQ3
DQ7
DQ5
VDD
CS
A10
WE
9
(mm ball pitch)
54 Ball FBGA
Comments
(8x8mm)
2/47
Pb-free
Pb-free
Pb-free
Pb-free
Pb-free
Pb-free

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