XC3S1000-4FG456I Xilinx Inc, XC3S1000-4FG456I Datasheet - Page 79

• Manufacturer Part Number: XC3S1000-4FG456I
• Description: FIELD PROGRAMMABLE GATE ARRAY
• Manufacturer: Xilinx Inc
• Series: Spartan™-3r

Specifications of XC3S1000-4FG456I

• Number Of Logic Elements/cells: 17280
• Number Of Labs/clbs: 1920
• Total Ram Bits: 442368
• Number Of I /o: 333
• Number Of Gates: 1000000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 456-BBGA
• Package: 456FBGA
• Family Name: Spartan®-3
• Device Logic Units: 17280
• Device System Gates: 1000000
• Maximum Internal Frequency: 630 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 333
• Ram Bits: 442368
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Simultaneously Switching Output Guidelines
This section provides guidelines for the maximum allowable
number of Simultaneous Switching Outputs (SSOs). These
guidelines describe the maximum number of user I/O pins,
of a given output signal standard, that should simulta-
neously switch in the same direction, while maintaining a
safe level of switching noise. Meeting these guidelines for
the stated test conditions ensures that the FPGA operates
free from the adverse effects of ground and power bounce.
Ground or power bounce occurs when a large number of
outputs simultaneously switch in the same direction. The
output drive transistors all conduct current to a common
voltage rail. Low-to-High transitions conduct to the V
rail; High-to-Low transitions conduct to the GND rail. The
resulting cumulative current transient induces a voltage dif-
ference across the inductance that exists between the die
pad and the power supply or ground return. The inductance
is associated with bonding wires, the package lead frame,
and any other signal routing inside the package. Other vari-
ables contribute to SSO noise levels, including stray induc-
tance on the PCB as well as capacitive loading at receivers.
Any SSO-induced voltage consequently affects internal
switching noise margins and ultimately signal quality.
Table 48
lines. For each device/package combination,
Table 48: Equivalent V
DS099-3 (v2.5) December 4, 2009
Product Specification
98
Notes:
1. The V
2. The CP132, CPG132, FG1156, and FGG1156 packages are being discontinued and are not recommended for new
3. The information in this table also applies to Pb-free packages.
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
Device
pair of interconnected banks shares three V
designs. See
and
CCO
R
Table 49
lines for the pair of banks on each side of the CP132 and TQ144 packages are internally tied together. Each
VQ100
http://www.xilinx.com/support/documentation/spartan-3_customer_notices.htm
1
1
-
-
-
-
-
-
provide the essential SSO guide-
CCO
CP132
/GND Pairs per Bank
1.5
-
-
-
-
-
-
-
(1,2)
TQ144
1.5
1.5
1.5
-
-
-
-
-
Spartan-3 FPGA Family: DC and Switching Characteristics
Table 48
(1)
CCO
PQ208
/GND pairs. Consequently, the per bank number is 1.5.
www.xilinx.com
2
2
2
CCO
pro-
-
-
-
-
-
FT256
vides the number of equivalent V
equivalent number of pairs is based on characterization and
will possibly not match the physical number of pairs. For
each output signal standard and drive strength,
recommends the maximum number of SSOs, switching in
the same direction, allowed per V
I/O bank. The
age style. Multiply the appropriate numbers from
and
allowed within an I/O bank. Exceeding these SSO guide-
lines may result in increased power or ground bounce,
degraded signal integrity, or increased system jitter.
The recommended maximum SSO values assume that the
FPGA is soldered on the printed circuit board and that the
board uses sound design practices. The SSO values do not
apply for FPGAs mounted in sockets, due to the lead induc-
tance introduced by the socket.
The number of SSOs allowed for quad-flat packages (VQ,
TQ, PQ) is lower than for ball grid array packages (FG) due
to the larger lead inductance of the quad-flat packages. Ball
grid array packages are recommended for applications with
a large number of simultaneously switching outputs.
3
3
3
-
-
-
-
-
Table 49
FG320
SSO
3
3
3
-
-
-
-
-
to calculate the maximum number of SSOs
Table 49
MAX
FG456
/IO Bank =
5
5
5
5
-
-
-
-
guidelines are categorized by pack-
FG676
Table 48
5
6
6
6
6
-
-
-
for the latest updates.
CCO
CCO
FG900
/GND pair within an
x
10
10
9
-
-
-
-
-
Table 49
/GND pairs. The
FG1156
Table 49
Table 48
12
12
-
-
-
-
-
-
(2)
79