ADSP-BF504BCPZ-3F Analog Devices Inc, ADSP-BF504BCPZ-3F Datasheet - Page 62

• Manufacturer Part Number: ADSP-BF504BCPZ-3F
• Description: Blackfin W/Processor & Executable Flash
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: Fixed Pointr

Specifications of ADSP-BF504BCPZ-3F

• Interface: CAN, EBI/EMI, I²C, IrDA, PPI, SPI, SPORT, UART/USART
• Clock Rate: 300MHz
• Non-volatile Memory: FLASH (16MB)
• On-chip Ram: 68kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.29V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADSP-BF504/ADSP-BF504F/ADSP-BF506F
When the ADC starts a conversion (see
version
Position B, causing the comparator to become unbalanced. Both
inputs are disconnected once the conversion begins. The con-
trol logic and the charge redistribution DACs are used to add
and subtract fixed amounts of charge from the sampling capaci-
tor arrays to bring the comparator back into a balanced
condition. When the comparator is rebalanced, the conversion
is complete. The control logic generates the ADC output code.
The output impedances of the sources driving the V
pins must be matched; otherwise, the two inputs will have dif-
ferent settling times, resulting in errors.
Analog Input Structure
Figure 64 (Equivalent Analog Input Circuit, Conversion
Phase—Switches Open, Track Phase—Switches
the equivalent circuit of the analog input structure of the ADC
in differential/pseudo differential mode. In single-ended mode,
V
protection for the analog inputs. Care must be taken to ensure
that the analog input signals never exceed the supply rails by
more than 300 mV. This causes these diodes to become for-
ward-biased and starts conducting into the substrate. These
diodes can conduct up to 10 mA without causing irreversible
damage to the part.
IN
is internally tied to AGND. The four diodes provide ESD
Conversion Phase—Switches Open, Track Phase—Switches Closed
V
V
Phase)), SW3 opens and SW1 and SW2 move to
IN+
IN–
B
B
V
A
A
Figure 64. Equivalent Analog Input Circuit,
V
IN+
REF
SW1
SW2
C1
V
Figure 63. ADC Conversion Phase
IN–
C1
C
C
S
S
V
DD
D
D
V
DD
SW3
D
D
COMPARATOR
R1 C2
Figure 63 (ADC Con-
R1 C2
CAPACITIVE
CAPACITIVE
CONTROL
Closed) shows
DAC
DAC
LOGIC
Rev. 0 | Page 62 of 80 | December 2010
IN+
and V
IN–
The C1 capacitors in
cuit, Conversion Phase—Switches Open, Track Phase—
Switches
uted to pin capacitance. The resistors are lumped components
made up of the on resistance of the switches. The value of these
resistors is typically about 100 . The C2 capacitors are the
ADC’s sampling capacitors with a capacitance of 45 pF typically.
For ac applications, removing high frequency components from
the analog input signal is recommended by the use of an RC
low-pass filter on the relevant analog input pins with optimum
values of 47
tortion and signal-to-noise ratio are critical, the analog input
should be driven from a low impedance source. Large source
impedances significantly affect the ac performance of the ADC
and may necessitate the use of an input buffer amplifier. The
choice of the op amp is a function of the particular application.
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of THD that can be
tolerated.
The THD increases as the source impedance increases and per-
formance degrades.
Frequency for Various Source Impedances, Single-Ended Mode
shows a graph of the THD vs. the analog input signal frequency
for different source impedances in single-ended mode, while
Figure 66 (THD vs. Analog Input Frequency for Various Source
Impedances, Differential
input signal frequency for different source impedances in differ-
ential mode.
Figure 67 (THD vs. Analog Input Frequency for Various Supply
Voltages) shows a graph of the THD vs. the analog input fre-
quency for various supplies while sampling at 2 MSPS. In this
case, the source impedance is 47 .
–50
–55
–60
–65
–70
–75
–80
–85
–90
Closed) are typically 4 pF and can primarily be attrib-
Figure 65. THD vs. Analog Input Frequency for Various
0
F
V
RANGE = 0V TO V
SAMPLE
DD
and 10 pF. In applications where harmonic dis-
Source Impedances, Single-Ended Mode
= 3V
100
R
= 1.5MSPS
SOURCE
Figure 65 (THD vs. Analog Input
Figure 64 (Equivalent Analog Input Cir-
200
Mode) shows the THD vs. the analog
REF
=
R
INPUT FREQUENCY (kHz)
SOURCE
10Ÿ
R
SOURCE
300
=
47Ÿ
=
R
100Ÿ
SOURCE
400
R
SOURCE
=
300Ÿ
500
=
0Ÿ
600