ADSP-BF504BCPZ-3F Analog Devices Inc, ADSP-BF504BCPZ-3F Datasheet - Page 66

• Manufacturer Part Number: ADSP-BF504BCPZ-3F
• Description: Blackfin W/Processor & Executable Flash
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: Fixed Pointr

Specifications of ADSP-BF504BCPZ-3F

• Interface: CAN, EBI/EMI, I²C, IrDA, PPI, SPI, SPORT, UART/USART
• Clock Rate: 300MHz
• Non-volatile Memory: FLASH (16MB)
• On-chip Ram: 68kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.29V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADSP-BF504/ADSP-BF504F/ADSP-BF506F
required acquisition time for the next sampling instant at Point
B; therefore, the analog inputs are configured as differential for
that conversion.
The channels used for simultaneous conversions are selected via
the multiplexer address input pins, A0 to A2. The logic states of
these pins also need to be established prior to the acquisition
time; however, they may change during the conversion time
provided the mode is not changed. If the mode is changed from
fully differential to pseudo differential, for example, then the
acquisition time would start again from this point. The selected
input channels are decoded as shown in
Type and Channel
The analog input range of the ADC can be selected as 0 V to
V
made in a similar fashion to that of the SGL/DIFF pin by setting
the logic state of the RANGE pin a time t
edge of CS. Subsequent to this, the logic level on this pin can be
Table 52. ADC Output Coding
Table 53. Analog Input Type and Channel Selection
SGL/DIFF
0
0
1
1
0
0
SGL/DIFF
1
1
1
1
1
1
0
0
0
0
0
0
REF
SGL/DIFF
ADSCLK
or 0 V to 2 × V
Figure 77. Selecting Differential or Single-Ended Configuration
CS
(Differential Input)
(Differential Input)
(Single-Ended Input)
(Single-Ended Input)
(Pseudo-Differential Input)
(Pseudo-Differential Input)
A
Selection).
REF
A2
0
0
0
0
1
1
0
0
0
0
1
1
1
t
ACQ
via the RANGE pin. This selection is
14
A1
0
0
1
1
0
0
0
0
1
1
0
0
Table 53 (Analog Input
acq
RANGE
0
1
0
1
0
1
B
prior to the falling
A0
0
1
0
1
0
1
0
1
0
1
0
1
1
Rev. 0 | Page 66 of 80 | December 2010
(0 V to V
(0 V to 2 × V
(0 V to V
(0 V to2 × V
(0 V to V
(0 V to 2 × V
14
V
V
V
V
V
V
V
V
V
V
V
V
V
A1
A2
A3
A4
A5
A6
A1
A1
A3
A3
A5
A5
IN+
REF
REF
REF
)
)
)
REF
REF
REF
)
)
)
ADC A
V
AGND
AGND
AGND
AGND
AGND
AGND
V
V
V
V
V
V
A2
A2
A4
A4
A6
A6
IN–
altered after the third falling edge of ADSCLK. If this pin is tied
to a logic low, the analog input range selected is 0 V to V
this pin is tied to a logic high, the analog input range selected is
0 V to 2 × V
Output Coding
The ADC output coding is set to either twos complement or
straight binary, depending on which analog input configuration
is selected for a conversion.
shows which output coding scheme is used for each possible
analog input configuration.
Transfer Functions
The designed code transitions occur at successive integer LSB
values (1 LSB, 2 LSB, and so on). In single-ended mode, the LSB
size is V
size is 2 × V
differential mode, the LSB size is 2 × V
V
V to 2 × V
the ADC when straight binary coding is output is shown in
Figure 78 (Straight Binary Transfer
ideal transfer characteristic for the ADC when twos comple-
ment coding is output is shown in
Complement Transfer Characteristic with VREF ± VREF Input
Range) (this is shown with the 2 × V
REF
range is used, and the LSB size is 4 × V
REF
V
V
V
V
V
V
V
V
V
V
V
V
V
Output Coding
Twos complement
Twos complement
Straight binary
Twos complement
Straight binary
Twos complement
B1
B2
B3
B4
B5
B6
B1
B1
B3
B3
B5
B5
IN+
REF
/4096 when the 0 V to V
REF
REF
range is used. The ideal transfer characteristic for
/4096 when the 0 V to 2 × V
.
ADC B
V
AGND
AGND
AGND
AGND
AGND
AGND
V
V
V
V
V
V
B2
B2
B4
B4
B6
B6
IN–
Table 52 (ADC Output
Comment
Single ended
Single ended
Single ended
Single ended
Single ended
Single ended
Fully differential
Pseudo differential
Fully differential
Pseudo differential
Fully differential
Pseudo differential
REF
Figure 79 (Twos
Characteristic), and the
REF
range is used, and the LSB
REF
range).
/4096 when the 0 V to
REF
REF
range is used. In
/4096 when the 0
Coding)
REF
. If