WM8903LGEFK/RV Wolfson Microelectronics, WM8903LGEFK/RV Datasheet - Page 120

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WM8903LGEFK/RV

Manufacturer Part Number
WM8903LGEFK/RV
Description
Audio CODECs ULTRA LOW PWR HI FI CODEC
Manufacturer
Wolfson Microelectronics
Datasheets

Specifications of WM8903LGEFK/RV

Audio Codec Type
Stereo Codec
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
6
No. Of Output Channels
8
Adc / Dac Resolution
24bit
Sampling Rate
96kHz
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Adcs / Dacs Signal To Noise Ratio
96dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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WM8903
w
WSEQ_DATA_WIDTH is a 3-bit field which identifies the width of the data block to be written. This
enables selected portions of a Control Register to be updated without any concern for other bits
within the same register, eliminating the need for read-modify-write procedures. Values of 0 to 7
correspond to data widths of 1 to 8 respectively. For example, setting WSEQ_DATA_WIDTH = 010
will cause a 3-bit data block to be written. Note that the maximum value of this field corresponds to
an 8-bit data block; writing to register fields greater than 8 bits wide must be performed using two
separate operations of the Control Write Sequencer.
WSEQ_DATA is an 8-bit field which contains the data to be written to the selected Control Register.
The WSEQ_DATA_WIDTH field determines how many of these bits are written to the selected
register; the most significant bits (above the number indicated by WSEQ_DATA_WIDTH) are
ignored.
WSEQ_DELAY is a 4-bit field which controls the waiting time between the current step and the next
step in the sequence. The total delay time per step (including execution) is given by:
This gives a useful range of execution/delay times from 562μs up to 2.048s per step.
WSEQ_EOS is a 1-bit field which indicates the End of Sequence. If this bit is set, then the Control
Write Sequencer will automatically stop after this step has been executed.
Table 77 Write Sequencer Control - Programming a Sequence
R108 (6Ch)
Write
Sequencer 0
R109 (6Dh)
Write
Sequencer 1
R110 (6Eh)
Write
Sequencer 2
REGISTER
ADDRESS
T = k × (2
where k = 62.5μs (under recommended operating conditions)
14:12
11:8
11:8
BIT
4:0
7:0
7:0
WSEQ_DELAY
14
WSEQ_WRIT
E_INDEX [4:0]
WSEQ_DATA
_WIDTH [2:0]
WSEQ_DATA
_START [3:0]
WSEQ_ADDR
[7:0]
WSEQ_EOS
WSEQ_DELA
Y [3:0]
WSEQ_DATA
[7:0]
LABEL
+ 8)
0000_0000
0000_0000
DEFAULT
0_0000
0000
0000
000
0
Sequence Write Index. This is the
memory location to which any updates
to R109 and R110 will be copied.
0 to 31 = RAM addresses
Width of the data block written in this
sequence step.
000 = 1 bit
001 = 2 bits
010 = 3 bits
011 = 4 bits
100 = 5 bits
101 = 6 bits
110 = 7 bits
111 = 8 bits
Bit position of the LSB of the data block
written in this sequence step.
0000 = Bit 0
1111 = Bit 15
Control Register Address to be written to
in this sequence step.
End of Sequence flag. This bit indicates
whether the Control Write Sequencer
should stop after executing this step.
0 = Not end of sequence
1 = End of sequence (Stop the
sequencer after this step).
Time delay after executing this step.
Total time per step (including execution)
= 62.5μs × (2
Data to be written in this sequence step.
When the data width is less than 8 bits,
then one or more of the MSBs of
WSEQ_DATA are ignored. It is
recommended that unused bits be set to
0.
PD, Rev 4.0, September 2010
DESCRIPTION
WSEQ_DELAY
+ 8)
Production Data
120

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