WM8903LGEFK/RV Wolfson Microelectronics, WM8903LGEFK/RV Datasheet - Page 170

• Manufacturer Part Number: WM8903LGEFK/RV
• Description: Audio CODECs ULTRA LOW PWR HI FI CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8903LGEFK/RV

• Audio Codec Type: Stereo Codec
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 6
• No. Of Output Channels: 8
• Adc / Dac Resolution: 24bit
• Sampling Rate: 96kHz
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Adcs / Dacs Signal To Noise Ratio: 96dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8903
R129 (81h)
FLL Control
2
Register 81h FLL Control 2
w
REGISTER
ADDRESS
12:11
10:9
BIT
8:6
5:3
2:0
FLL_CLK_SRC
[1:0]
FLL_CLK_REF
_DIV [1:0]
FLL_CTRL_RA
TE [2:0]
FLL_OUTDIV
[2:0]
FLL_FRATIO
[2:0]
LABEL
DEFAULT
000
000
000
00
00
FLL Clock source
00 = MCLK
01 = BCLK
10 = LRC
11 = Reserved
FLL Clock Reference Divider
00 = MCLK / 1
01 = MCLK / 2
10 = MCLK / 4
11 = MCLK / 8
MCLK (or other input reference) must be divided down
to <=13.5MHz.
For lower power operation, the reference clock can be
divided down further if desired.
Frequency of the FLL control block
000 = FVCO / 1 (Recommended value)
001 = FVCO / 2
010 = FVCO / 3
011 = FVCO / 4
100 = FVCO / 5
101 = FVCO / 6
110 = FVCO / 7
111 = FVCO / 8
Recommended that this register is not changed from
default.
FOUT clock divider
000 = 2
001 = 4
010 = 8
011 = 16
100 = 32
101 = 64
110 = 128
111 = 256
(FOUT = FVCO / FLL_OUTDIV)
F
000 = divide by 1
001 = divide by 2
010 = divide by 4
011 = divide by 8
1XX = divide by 16
000 recommended for F
100 recommended for F
VCO
clock divider
DESCRIPTION
REF
REF
> 1MHz
< 64kHz
PD, Rev 4.0, September 2010
Production Data
170