M54455EVB Freescale, M54455EVB Datasheet - Page 19

• Manufacturer Part Number: M54455EVB
• Manufacturer: Freescale

Specifications of M54455EVB

• Architecture: 32-bit (not ARM)
• Lead Free Status / RoHS Status: Supplier Unconfirmed

4.7.4
The four interrupt signals on each PCI slot (INTA–INTD) are wire ORed together to form one interrupt
source per slot. These four interrupt sources are routed to the system FPGA. The FPGA routes these
interrupts to the MCF5445x as programmed by you. Please refer to
details on how to program the FPGA’s interrupt controller.
4.8
A stereo audio codec is connected to the MCF5445x’s SSI interface. The SSI operates in I
transfer audio data to and from a TLV320AIC23B device. The codec’s control communications SPI
channel is accessed through the MCF5445x’s DSPI interface using DSPI_PCS5. The line-in, line-out, and
microphone inputs of the codec are brought to a 3.5-mm triple audio connector with PC-99 standard color
coding. Refer to
For accessibility ease, all the SSI signals from the MCF5445x are brought to a header, J910.
Freescale Semiconductor
Audio
PCI Interrupts
Figure 11. PCI Grant 2 and Grant 3 Cut Trace Option—Use FPGA for Arbitration
Section 2.4, “I/O Back
Signal Name
SSI_MCLK
SSI_RXD
SSI_FS
M54455EVB User’s Manual, Rev. 4
Table 9. SSI Signals on J910
Panel” for location and connection information.
Pin Pin
1
3
5
2
4
6
Signal Name
SSI_BCLK
SSI_TXD
GND
Section 4.13.1, “FPGA
2
Registers” for
S mode to
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