M54455EVB Freescale, M54455EVB Datasheet - Page 2

• Manufacturer Part Number: M54455EVB
• Manufacturer: Freescale

Specifications of M54455EVB

• Architecture: 32-bit (not ARM)
• Lead Free Status / RoHS Status: Supplier Unconfirmed

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2.1
The MCF54455 is the host processor for the M54455EVB.
the MCF54455 superset device. The following is a brief summary of the functional blocks in the
MCF54455 superset device.
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Universal Serial Bus Specification, Revision 2.0
PCI Local Bus Specification, Revision 2.2
DDR2 SDRAM Specification (JESD79-2C)
Version 4 ColdFire Core with MMU and EMAC
— Up to 410 Dhrystone 2.1 MIPS @ 266 MHz
16 KBytes instruction cache and 16 KBytes data cache
32 Kbytes internal SRAM
Support for booting from SPI-compatible flash, EEPROM, and FRAM devices
Crossbar switch technology (XBS) for concurrent access to peripherals or RAM from multiple bus
masters
16 channel DMA controller
16-bit 133MHz DDR/mobile-DDR/DDR2 Controller
USB 2.0 On-the-Go controller with ULPI support
32-bit PCI controller @ 66MHz
ATA/ATAPI controller
Two 10/100 Fast Ethernet Controllers (FECn)
Cryptographic acceleration unit (CAU)
Random number generator
Synchronous serial interface
Four periodic interrupt timers
Four 32-bit timers with DMA support
DMA-supported serial peripheral interface (DSPI)
Three UARTs
I
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C bus interface
Overview
MCF54455 Overview
M54455EVB User’s Manual, Rev. 4
Figure 1
shows a top-level block diagram of
Freescale Semiconductor