M54455EVB Freescale, M54455EVB Datasheet - Page 33

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M54455EVB

Manufacturer Part Number
M54455EVB
Description
Manufacturer
Freescale
Datasheet

Specifications of M54455EVB

Architecture
32-bit (not ARM)
Lead Free Status / RoHS Status
Supplier Unconfirmed
CPLD_LED
4.14.3.6
CPLD_LEDS controls the state of the CPLD’s LEDs.
4.15
The four external MCF5445x interrupt requests are driven by the FPGA. The FPGA gathers four PCI
interrupts from the PCI slots, along with two pushbutton interrupts, and presents them to the MCF5445x.
Refer to
4.16
The MCF5445x contains a few serial interfaces and timers that are not made available via dedicated
interfaces on the M54455EVB. However, these interfaces (and others) are brought out to a general purpose
header, J908, for easy access. The following interfaces are accessible on J908:
Table 34
Freescale Semiconductor
Field
7–6
5–0
Address: 0x0800_0005 (CPLD_LEDS)
Reset:
DSPI
I
DMA external request/acknowledge
DMA timer input/output
UART0
UART1
2
Section 4.13,
C
shows the signal assignments on J908.
Interrupts
Serial Interface Header
W
R
Reserved, must be cleared.
Controls the state of the CPLD’s LED[5:0] signals. LED[5:0] corresponds to D35–D30.
0 Corresponding CPLD LED is OFF
1 Corresponding CPLD LED is ON
CPLD LED Control Register (CPLD_LEDS)
0
0
7
“FPGA” for details on how to enable and route the interrupts.
6
0
0
Table 33. CPLD_LEDS Field Descriptions
Figure 24. CPLD_LEDS Register
M54455EVB User’s Manual, Rev. 4
0
5
0
4
Description
0
3
CPLD_LED
0
2
0
1
0
0
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