M54455EVB Freescale, M54455EVB Datasheet - Page 24

• Manufacturer Part Number: M54455EVB
• Manufacturer: Freescale

Specifications of M54455EVB

• Architecture: 32-bit (not ARM)
• Lead Free Status / RoHS Status: Supplier Unconfirmed

1
Address: 0x0900_0008 (PCI_CLK_CFG)
This value is reset to 0 if not using the ATX power supply.
CLKGENS2EN
4.13.1.3
4.13.1.4
24
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CLKGENS2
M66EN
W
R
Field
31–3
Field
31–6
SW7
5–4
2
1
0
Address: 0x0900_000C (FPGA_IRQROUTE)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1
W
Reserved, must be cleared.
SW7 IRQ selection (pushbutton)
00 IRQ1
01 IRQ3
10 IRQ4
11 IRQ7
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FPGA PCI Clock Configuration Register (FPGA_PCICLKCFG)
FPGA Interrupt Request Routing Register (FPGA_IRQROUTE)
Reserved, must be cleared.
State of the M66EN pin from the PCI slots.
0 33MHz card is installed in a PCI slot. The input clock and PCI clocks is 33MHz
1 Non 33MHz cards are installed. PCI speed is determined by CLKGENS2EN and/or external jumper on header
State of the S2 control input to the CY22393 clock generator. For the S2 pin to assert, M66EN must be set, the
jumper across pins 3 and 4 on H4 must be removed, and CLKGENS2EN must be set.
0 Input clock and PCI clocks are operating at 33MHz
1 Input clock and PCI clocks are operating at 66MHz
Assert the S2 control input to the CY22393 clock generator. If the M66EN pin is pulled-low, this bit is ignored. A
0 Set input clock and PCI clocks to 33MHz
1 Set input clock and PCI clocks to 66MHz
jumper shunt across H4[3:4] also overrides this setting and force 33MHz operation. The CLKGENS2 bit always
reflects the current state of the S2 signal.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
H4[3:4]
Table 15. FPGA_PCICLKCFG Field Descriptions
Table 16. FPGA_IRQROUTE Field Descriptions
Figure 14. FPGA_PCICLKCFG Register
Figure 15. FPGA IRQROUTE Register
M54455EVB User’s Manual, Rev. 4
Description
Description
8
7
6
8
5
7
4
6
3
Freescale Semiconductor
SW7 SW6 PCI
M66
5
EN
1
2
1
4
CLKGEN
3
S2
2
0
1
1
0
CLKGEN
S2EN
0
0