M54455EVB Freescale, M54455EVB Datasheet - Page 27

• Manufacturer Part Number: M54455EVB
• Manufacturer: Freescale

Specifications of M54455EVB

• Architecture: 32-bit (not ARM)
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Section 4.2, “Reset
mode selection information is provided in
blocks of the CPLD are described in the sections below.
4.14.1
The CPLD outputs several signals to enable, disable, and control signal routing to and from several
peripherals on the M54455EVB. The state of these signals is controllable via a bank of eight DIP switches
(SW1) and a Flexbus-accessible memory-mapped register, CPLD_CONTROL. The CPLD_MODE
register reflects the value of the switches at reset.
selection settings.
4.14.1.1
The following table shows the switch settings that control the boot configuration options.
“MCF5445x Boot
4.14.1.2
The CPLD determines how to route Flexbus chip-selects FB_CS0 and FB_CS1 to the two flash devices.
The flash connected to FB_CS0 is the boot device. Refer to
Freescale Semiconductor
CPLD Mode Control
SW1 [1] SW1 [2]
Boot Mode Configuration
Boot Flash Selection
OFF
OFF
ON
ON
Options” provides detailed information on the available boot options.
1
SW1 Switches
Controller” provides detailed information on the CPLD’s role as reset controller. Boot
These switch settings can be overridden by software via the CPLD_CONTROL
register
OFF
OFF
ON
ON
1 & 2
4
5
6
3
8
1
1
1
Boot from Flexbus with defaults (from RCON register)
Reserved
Boot from Flexbus and override defaults via data bus (FB_AD[7:0])
Boot from Flexbus and override defaults via serial boot facility (SPI memory)
Table 20. CPLD Mode Configuration Switch
Boot mode configuration
Boot flash selection
ULPI PHY reset control
ATA/FEC1 selection
FEC0 PHY power down
MCF5445x test mode
Table 21. CPLD Boot Mode Selection
M54455EVB User’s Manual, Rev. 4
Section 4.3, “MCF5445x Boot
Description
Table 20
Meaning
summarizes the controllable CPLD mode
Section 4.6,
Output Signals Affected
BOOTMOD[1:0]
PHY1_PWRDN
PHY0_PWRDN
RMIICLK2_EN
ATA_ENABLE
ULPI_RESET
FLASH1_CS
FLASH0_CS
TEST
“Flash” for more information.
Options”. The other functional
Section 4.3,
27