M54455EVB Freescale, M54455EVB Datasheet - Page 25

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M54455EVB

Manufacturer Part Number
M54455EVB
Description
Manufacturer
Freescale
Datasheet

Specifications of M54455EVB

Architecture
32-bit (not ARM)
Lead Free Status / RoHS Status
Supplier Unconfirmed
4.13.1.5
The FPGA_VERSION register reflects the version of the FPGA code image.
Freescale Semiconductor
MAJOR_REV
MINOR_REV
BUILD_WW
31–24
23–16
Field
Field
SW6
15–8
3–2
1–0
PCI
7–0
Address: 0x0900_0010 (FPGA_VERSION)
Reset 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0
W
SW6 IRQ selection (pushbutton)
00 IRQ1
01 IRQ3
10 IRQ4
11 IRQ7
PCI IRQ selection
00 IRQ1
01 IRQ3
10 IRQ4
11 IRQ7
R
Build date work week
Reserved, must be cleared.
Major revision number.
Example: Revision 1.2 of the FPGA code. MAJOR_REV = 0x01, MINOR_REV = 0x02
Minor revision number.
Example: Revision 1.2 of the FPGA code. MAJOR_REV = 0x01, MINOR_REV = 0x02
FPGA Version Register (FPGA_VERSION)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
BUILD_WW
Table 16. FPGA_IRQROUTE Field Descriptions (continued)
Table 17. FPGA_VERSION Field Descriptions
Figure 16. FPGA Version Register
0 0 0 0 0 0 0 0
M54455EVB User’s Manual, Rev. 4
Description
Description
MAJOR_REV
8
7
6
MINOR_REV
5
4
3
2
1
0
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