PEF22558EV11GXP Lantiq, PEF22558EV11GXP Datasheet - Page 63

PEF22558EV11GXP

Manufacturer Part Number
PEF22558EV11GXP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF22558EV11GXP

Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant
Figure 32
15.2
The register GPC1 (global port configuration register 1) is used in the QuadFALC
configure the sources of FSC out of the 4 channels. In compatibility mode of the
OctalFALC
one GPC1 register exists in every of the both pseudo QuadFALC
GPC1register its only possible to control a 4:1 multiplexer. But really eight channels
exists in the OctalFALC
only one FSC/SEC pin exists in the OctalFALC
solution using an additional 2:1 multiplexer.
Delta Sheet
DSTR (A10=CS2=1; CS1=0)
DSTR (A10=CS2=0; CS1=1)
VSTR (A10=CS2=1; CS1=0)
VSTR (A10=CS2=0; CS1=1)
QuadFALC V2.1:
OctalFALC V1.1, COMP=1:
OctalFALC V1.1, COMP=0:
TM
Pseudo QuadFALC
VSTR (A10=x)
DSTR (A10=x)
(pin COMP = ´1´) this register must have the same function. That means
VSTR and DSTR Register Compatibility
VSTR
TM
0
0
0
0
0
0
0
and therefor 8:1 multiplexing must be performed, because
0
0
0
0
0
0
0
®
Register GPC1
0
0
0
0
0
1
0
63
0
0
0
0
0
0
0
TM
0
0
0
0
0
0
0
.
Figure 33
1
1
0
1
0
0
0
OctalFALC_Registers_2
0
0
0
0
1
0
0
shows the principle of the
1
1
1
1
1
0
0
®
s. So with these one
Register Functions
Rev. 2.0, 2005-05-03
Pseudo-QuadFALC 1
Pseudo-QuadFALC 2
OctalFALC
PEF 22558 E
®
TM
to

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