PEF22558EV11GXP Lantiq, PEF22558EV11GXP Datasheet - Page 7

• Manufacturer Part Number: PEF22558EV11GXP
• Manufacturer: Lantiq

Specifications of PEF22558EV11GXP

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 13
Table 14
Table 15
Table 16
Table 17
Table 18
Table 19
Table 20
Table 21
Table 22
Table 23
Table 24
Table 25
Table 26
Table 27
Table 28
Table 29
Table 30
Table 31
Table 32
Table 33
Delta Sheet
Overview Interface- and Basic Operation-Modes . . . . . . . . . . . . . . . . 11
Intel Bus Interface Timing Parameter Values . . . . . . . . . . . . . . . . . . . 14
Motorola Bus Interface Timing Parameter Values . . . . . . . . . . . . . . . . 16
Definition of Control Bits in Commands (CMD) . . . . . . . . . . . . . . . . . . 23
SCI Configuration Register Content. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SCI Timing Parameter Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SPI Interface Timing Parameter Values. . . . . . . . . . . . . . . . . . . . . . . . 26
Conditions for a PLL Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Receive FIFO User Depth (HDLC channel 1) and Bit Positions in Register
RBCL 38
System Multiplex Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Tristate Configurations for the RDO, RSIG, SCLKR and RFM Pins . . 41
Redundancy Application Using RLM Mode . . . . . . . . . . . . . . . . . . . . . 42
Redundancy Application Using the Analog Switch, Switching with only
one Board Signal 44
Serial Impedance Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Recommended Pulse Shaper Programming for T1/J1 with registers
XPM(2:0) (Compatible to QuadFALC®) 47
Recommended Pulse Shaper Programming for E1 with Registers
XPM(2:0) (Compatible to QuadFALC® ) 47
Recommended Pulse Shaper Programming for T1 with Registers
TXP(16:1) 48
Recommended Pulse Shaper Programming for E1 with Registers
TXP(16:1) 48
Receiver Configuration Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Multi Function Port Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Supported PRBS Polynomials (pattern). . . . . . . . . . . . . . . . . . . . . . . . 54
Bit/Timeslot Selection of PRBS Pattern . . . . . . . . . . . . . . . . . . . . . . . . 55
Out-Band Loop (BOM) Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Out-band Loop Messages for Loop Switching (T1/J1). . . . . . . . . . . . . 58
Overview of Additional Control Register Functions for E1 Mode . . . . . 65
Overview of Additional Status Register Functions for E1 Mode . . . . . 67
Overview of Additional Control Register Functions for T1/J1. . . . . . . . 68
Overview of Additional Status Register Functions for T1/J1s . . . . . . . 70
I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Pinstrapping Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
7
Rev. 2.0, 2005-05-03
OctalFALC
PEF 22558 E
Page
TM