PEF22558EV11GXP Lantiq, PEF22558EV11GXP Datasheet - Page 64

• Manufacturer Part Number: PEF22558EV11GXP
• Manufacturer: Lantiq

Specifications of PEF22558EV11GXP

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

Figure 33
The 2:1 multiplexer is controlled by the register bits GPC1.CSFP(1:0) of the second
Pseudo QuadFALC
bits GPC1.CSFP(1:0) of the first and the second Pseudo QuadFALC
ored.
In not compatibility mode the one global GPC2 register is used instead of the both GPC1
registers in compatibility mode.
15.3
Only the additional registers or registers with additional bits compared to the
QuadFALC
datasheet of the OctalFALC
Delta Sheet
CS2
CS1
A(9:0)
A(10:0)
Additional Registers or Register Bits
®
V2.1 are listed below. For detailed register description see the
Principle of configuration of SEC/FSC Output
Pseudo QuadFALC 1
Pseudo QuadFALC 2
®
. Enable of the SEC/FSC pin as output is performed by the register
GPC2, address 008A
GPC1, address 85
GPC1, address 85
GPC1, address 85
TM
(User’s Manual).
CSFP(1:0)
CSFP(1:0)
CSFP(1:0)
FSS(1:0)
FSS(1:0)
FSS(2:0)
64
OctalFALC_SEC_configuration
enable
enable
Register Functions
®
Rev. 2.0, 2005-05-03
were all are logical
COM P = ´1´
COM P = ´0´
OctalFALC
PEF 22558 E
SEC/FSC
SEC/FSC
TM