WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 121

no-image

WJLXT385LE.B1

Manufacturer Part Number
WJLXT385LE.B1
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of WJLXT385LE.B1

Lead Free Status / RoHS Status
Supplier Unconfirmed
Document Number: 249252
Revision Number: 006
Revision Date: 19-Jan-2006
Figure 27. Motorola Processor Non-Multiplexed Interface - Write Timing
D7:0
ACK
A4:0
AS
R/W
CS
DS
INT
(Connected High)
Figure 27
multiplexed interface, and a write cycle takes place.
is a timing diagram for the Motorola processor in the Host Processor mode, with a non-
tSAS
ADDRESS
tSRW
tHAS
tSCS
Intel
tDACKP
tVDS
®
LXT385 Octal E1 S/H PCM Transceiver with JA
tHRW
tHCS
tSDW
WRITE DATA
tDACK
tHDW
tINT
121

Related parts for WJLXT385LE.B1