WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 127

• Manufacturer Part Number: WJLXT385LE.B1
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT385LE.B1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

14.0
Document Number: 249252
Revision Number: 006
Revision Date: 19-Jan-2006
Table 70. Intel
Jitter Performance
This chapter includes tables and figures on jitter performance. For more information on jitter, see:
Table 70
Output jitter in remote loopback
Hardware mode, jitter attenuator corner frequency
(JACF) 3dB.
Jitter Attenuator Corner Frequency 3 dB, Host Processor Mode
FIFO is 32 bits
FIFO is 64 bits
Data-Latency Delay for FIFO
FIFO is 32 bits.
FIFO is 64 bits.
Input Jitter Tolerance before FIFO Overflow or Underflow (See Figure 32.)
FIFO is 32 bits.
FIFO is 64 bits.
Jitter Attenuation Limitation, per ITU-T G.736. (See Figure 33.)
At 3 Hz
At 40 Hz
At 400 Hz
At 100 KHz
•
•
1. Guaranteed by design and other correlation methods.
2. Delay is through jitter attenuator only. For total throughput delay, add the receive and transmit path delays.
Section 6.6, “Jitter Attenuation”
Table 40
®
LXT385 Transceiver Jitter Attenuator Characteristics
lists jitter attenuator characteristics for the LXT385 ransceiver.
1
in
Chapter 8.0, “Registers”
Parameter
1
.
(See Figure 34.)
Intel
®
LXT385 Octal E1 S/H PCM Transceiver with JA
+19.5
+19.5
Min.
-0.5
-0.5
1
Typ.
0.06
3.5
2.5
3.5
16
32
24
56
Max.
0.11
Unit
Hz
Hz
Hz
dB
dB
dB
dB
UI
UI
UI
UI
UI
ETSI CTR12/13
output jitter
Sinusoidal jitter
modulation
Sinusoidal jitter
modulation
See Note 2.
Test Condition
127