WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 67

• Manufacturer Part Number: WJLXT385LE.B1
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT385LE.B1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

6.7
6.7.1
Document Number: 249252
Revision Number: 006
Revision Date: 19-Jan-2006
Figure 8. Intel
Loopbacks
For diagnostics, the LXT385 ransceiver has the following loopback modes:
To select a loopback mode when the mode is in:
Analog Loopback
AsFigure 8
connected internally to the receiver inputs RTIP and RRING. For the corresponding receiver, clock
and data signals are output at RCLK, RPOS, and RNEG. (For the LOOP pin settings that select
analog loopback, see
When the LXT385 ransceiver is in an analog loopback, it ignores signals on RTIP and RRING.
* If decoder is enabled, either HDB3 or AMI can be selected.
** Either a transmitter or a receiver can be enabled for use with the jitter attenuator, but not both.
•
•
•
•
•
Section 6.7.1, “Analog Loopback”
Section 6.7.2, “Digital Loopback”
Section 6.7.3, “Remote Loopback”
Hardware mode, the LOOP pins can be used to select either an analog or remote loopback.
(See
Host Processor mode, the ALOOP, DLOOP, and RLOOP registers can be used to select an
analog, digital, or remote loopback. (See
®
RPOS
RNEG
TNEG
TPOS
RCLK
TCLK
LXT385 Transceiver Analog Loopback
Section 5.4, “Line Interface Unit
shows, when analog loopback is selected, the transmitter TTIP and TRING outputs are
Section 5.4, “Line Interface Unit
JA**
JA**
Intel
Signals”.)
Recovery
Control
Timing
Timing
and
Chapter 8.0,
®
LXT385 Octal E1 S/H PCM Transceiver with JA
Signals”.)
“Registers”.)
TTIP
TRING
RTIP
RRING
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