WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 91

• Manufacturer Part Number: WJLXT385LE.B1
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT385LE.B1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

9.0
9.1
9.2
Document Number: 249252
Revision Number: 006
Revision Date: 19-Jan-2006
Figure 15. JTAG Architecture
JTAG Boundary Scan
Overview
The LXT385 ransceiver supports IEEE 1149.1 compliant JTAG boundary scan. Boundary scan
allows easy access to the interface pins for board testing purposes.
In addition to the traditional IEE1149.1 digital boundary scan capabilities, theLXT385 ransceiver
also includes analog test port capabilities. This feature provides access to the TIP and RING signals
in each channel (transmit and receive). This way, the signal path integrity across the primary
winding of each coupling transformer can be tested.
Architecture
The basic JTAG architecture of the LXT385 ransceiver is illustrated in
The LXT385 ransceiver JTAG architecture includes a TAP Test Access Port Controller, data
registers and an instruction register. The following paragraphs describe these blocks in detail.
TRST
TMS
TCK
TDI
Controller
TAP
Device Identification Register
Boundry Scan Data Register
Analog Port Scan Register
Instruction Register
Bypass Register
BSR
ASR
BYR
IDR
Intel
IR
®
LXT385 Octal E1 S/H PCM Transceiver with JA
Figure
MUX
15.
TDO
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