FWLXT9785BC.A4 Intel, FWLXT9785BC.A4 Datasheet - Page 12

• Manufacturer Part Number: FWLXT9785BC.A4
• Manufacturer: Intel

Specifications of FWLXT9785BC.A4

• Lead Free Status / RoHS Status: Not Compliant

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Description
Section 4.3.7, “MDIO Management Interface”:
Added note under second paragraph.
Added last paragraph.
Added note under Section 4.3.8, “MII Sectionalization”.
Added new Section 4.3.11, “FIFO Initial Fill Values”
Modified paragraph three under Section 4.4.1, “Power Requirements”.
Added notes under second and last paragraphs under Section 4.5.3, “Power-Down Mode”.
Modified last bullet under Section 4.5.3.1, “Global (Hardware) Power Down”.
Added last paragraph to Section 4.5.4, “Reset”.
Modified Table 42 “Intel
Change heading and modified last line under Section 4.6.1.2, “Manual Next Page Exchange”.
Section 4.6.1.4, “Link Criteria”:
Changed scrambler to descrambler in first line.
Modified second paragraph.
Added two new paragraphs.
Added second paragraph under Section 4.6.1.5, “Parallel Detection”.
Modified paragraphs under Section 4.6.1.6, “Reliable Link Establishment While Auto MDI/MDIX is
Enabled in Forced Speed Mode”.
Changed “1110” to “0101” under Section 4.7.4.3, “Receive Error”.
Added note under first paragraph of Section 4.8, “RMII Operation”
Changed “asynchronously” to “synchronously” in second paragraph under Section 4.9.3.3, “Carrier
Sense/Data Valid (RMII)”.
Modified last sentence in first paragraph under Section 4.9.3.4, “Carrier Sense (SMII)”.
Modified paragraph under Section 4.9.3.6.3, “Polarity Correction”.
Added note under Section 4.9.3.7, “Fiber PMD Sublayer”.
Added second paragraph under Section 4.9.3.7.1, “Far End Fault Indications”.
Modified/added text under Section 4.10.1, “Preamble Handling”.
Modified text under Section 4.10.4, “Jabber”.
Modified first paragraph under Section 4.11, “DTE Discovery Process”.
Modified Item 1 of Section 4.11.2, “Interaction between Processor, MAC, and PHY”.
Modified second paragraph under Section 4.11.4, “DTE Discovery Process Flow”.
Added Section 4.11.5, “DTE Discovery Behavior”
Added BGA15 information into first paragraph under Section 4.12.2, “Per-Port LED Driver
Functions”.
Added last sentence to first paragraph and note under first paragraph under Section 4.12.3, “Out-of-
Band Signaling”.
Added Section 4.13, “Cable Diagnostics Overview”.
Modified/added text under Section 4.13.3, “Implementation Considerations”.
Added Section 4.14, “Link Hold-Off Overview”.
Modified Table 52 “Intel
®
®
LXT9785/9785E Global Hardware Configuration Settings”.
LXT9785/LXT9785E Operating Conditions”
Revision Date: August 28, 2003
Revision Number: 007
(Sheet 2 of 3)
Revision Date: 30-May-2006
Document Number: 249241
Revision Number: 010
Datasheet