FWLXT9785BC.A4 Intel, FWLXT9785BC.A4 Datasheet - Page 189

• Manufacturer Part Number: FWLXT9785BC.A4
• Manufacturer: Intel

Specifications of FWLXT9785BC.A4

• Lead Free Status / RoHS Status: Not Compliant

Datasheet
Document Number: 249241
Revision Number: 010
Revision Date: 30-May-2006
Figure 50. SS-SMII - 10BASE-T Transmit Timing
Table 71. SS-SMII - 10BASE-T Transmit Timing Parameters
TxSYNC setup to TxCLK rising edge and
TxData setup to TxCLK rising edge
TxSYNC hold to TxCLK rising edge and TxData
hold from TxCLK rising edge
TxData to TPFO Latency
NOTE: The table latency values are derived with the hardware configuration pins FIFOSEL[1:0] set at a
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. “BT” signifies bit times at the line rate (that is, BT = 100 ns if using 10BASE-T, BT = 10 ns if using
testing.
100BASE-TX or 100BASE-FX).
default configuration of 00 (32 bits of initial fill).
TxSYNC
TxData
TxCLK
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
TPFO
Parameter
t
1
t
2
t
3
Sym
t1
t2
t3
Min
1.5
1.0
–
t
Typ
1
10
–
–
1
t
2
Max
14
–
–
Units
BT
ns
ns
2
Conditions
Test
–
–
–
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