FWLXT9785BC.A4 Intel, FWLXT9785BC.A4 Datasheet - Page 125

• Manufacturer Part Number: FWLXT9785BC.A4
• Manufacturer: Intel

Specifications of FWLXT9785BC.A4

• Lead Free Status / RoHS Status: Not Compliant

4.4.2.5
4.5
4.5.1
4.5.2
Datasheet
Document Number: 249241
Revision Number: 010
Revision Date: 30-May-2006
Note: Although RXCLK is referenced to REFCLK, the RXCLK may vary in cumulative phase by up to
RxCLK Signal (SS-SMII Only)
In SS-SMII mode, the LXT9785/LXT9785E provides a 125 MHz clock output in reference to the
output RxDatan. RxCLK is referenced and synchronized to the REFCLK. See
140.
four bit-times relative to REFCLK.
Initialization
When the LXT9785/LXT9785E is first powered on, reset, or encounters a link failure state, it
checks the MDIO register configuration bits to determine the line speed and operating conditions
to use for the network link. The configuration bits may be set by the Hardware Control or MDIO
interface as shown in
MDIO Control Mode
In the MDIO Control mode, the LXT9785/LXT9785E reads the Hardware Control Interface pins to
set the initial (default) values of the MDIO registers. Once the initial values are set, bit control
reverts to the MDIO interface.
Hardware Control Mode
In the Hardware Control Mode, the LXT9785/LXT9785E disables direct write operations to the
MDIO registers via the MDIO Interface. On power-up or hardware reset, the LXT9785/LXT9785E
reads the Hardware Control Interface pins and sets the MDIO registers accordingly.
The following modes are available using either Hardware Control or MDIO Control:
When the network link is forced to a specific configuration, the LXT9785/LXT9785E immediately
begins operating the network interface as commanded. When auto-negotiation is enabled, the
LXT9785/LXT9785E begins the auto-negotiation/ parallel-detection operation.
•
•
•
•
•
•
Force network link to 100BASE-FX (Fiber).
Force network link operation to:
Allow auto-negotiation/parallel-detection.
Auto/Manual MDIX enable/disable.
Pause for full-duplex links operation.
Global Output Slew Rate Control.
— 100BASE-TX, Full-Duplex
— 100BASE-TX, Half-Duplex
— 10BASE-T, Full-Duplex
— 10BASE-T, Half-Duplex
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Figure 13 on page
126.
Figure 23 on page
125