ISP1161A1BD,151 STEricsson, ISP1161A1BD,151 Datasheet - Page 55

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ISP1161A1BD,151

Manufacturer Part Number
ISP1161A1BD,151
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1161A1BD,151

Lead Free Status / RoHS Status
Supplier Unconfirmed
Table 24.
Table 26.
ISP1161A1_4
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HCFmNumber register: bit allocation
HcLSThreshold register: bit allocation
10.2.4 HcLSThreshold register (R/W: 11H/91H)
31
23
15
31
23
7
Table 25.
The HcLSThreshold register contains an 11-bit value used by the HC to determine
whether to commit to the transfer of a maximum of 8-byte LS packet before EOF. Neither
the HC nor the HCD is allowed to change this value.
Code (Hex): 11 — read
Code (Hex): 91 — write
Bit
31 to 16
15 to 0
30
22
14
30
22
6
HcFmNumber register: bit description
Symbol
FN[15:0]
29
21
13
29
21
5
Rev. 04 — 29 January 2009
Description
reserved
FrameNumber: This field is incremented when HcFmRemaining is
reloaded. It rolls over to 0000H after FFFFH. When the
USBOperational state is entered, this field will be incremented
automatically. The HC will set bit StartofFrame in the HcInterruptStatus
register.
28
20
12
28
20
4
reserved
reserved
reserved
reserved
FN[15:8]
FN[7:0]
R/W
R/W
00H
00H
00H
00H
00H
00H
R
R
R
R
USB single-chip host and device controller
27
19
11
27
19
3
26
18
10
26
18
2
ISP1161A1
© ST-NXP Wireless 2009. All rights reserved.
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