LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 120

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LSI53C825AJ

Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C825AJ

Lead Free Status / RoHS Status
Not Compliant
4-32
Registers
The LSI53C825A is connected to a hard disk which can
transfer data at 10 Mbytes/s synchronously. The
LSI53C825A SCLK is running at 40 MHz. The
synchronous transfer period (SXFERP) is found as
follows:
SXFERP = Period/SSCP + ExtCC
Period = 1
SSCP = 1
(This SCSI synchronous core clock is determined in
SCSI Control Three
SCSI Control One
LSI53C825A is sending data. ExtCC = 0 if the
LSI53C825A is receiving data.)
SXFERP = 100
Where
SXFERP
SSCP
SSCF
ExtCC
Synchronous transfer period
SCSI synchronous core period
SCSI synchronous core frequency
Extra clock cycle of data setup
SSCF = 1
Frequency = 1
25 = 4
(SCNTL1), bit 7 is asserted and the
(SCNTL3), bits [6:4], ExtCC = 1 if
40 MHz = 25 ns
10 Mbytes/s = 100 ns

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