LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 217

no-image

LSI53C825AJ

Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C825AJ

Lead Free Status / RoHS Status
Not Compliant
SCSIP[2:0]
Transfer Control Instructions
RA
Interrupt-on-the-Fly Instruction
The LSI53C825A can do a true/false comparison of the
ALU carry bit or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and
True/False bit fields.
If the comparisons are true, and the Interrupt-on-the-Fly
bit
asserts the Interrupt-on-the-Fly bit.
SCSI Phase
This 3-bit field corresponds to the three SCSI bus phase
signals that are compared with the phase lines latched
when SREQ/ is asserted. Comparisons can be performed
to determine the SCSI phase actually being driven on the
SCSI bus. The following table describes the possible
combinations and their corresponding SCSI phase.
These bits are only valid when the LSI53C825A is
operating in Initiator mode. Clear these bits when the
LSI53C825A is operating in Target mode.
MSG
0
0
0
0
1
1
1
1
Relative Addressing Mode
When this bit is set, the 24-bit signed value in the
SCRIPTS Pointer Save (DSPS)
relative offset from the current
(DSP)
not the one currently executing). The relative mode does
not apply to Return and Interrupt SCRIPTS.
(Interrupt Status
address (which is pointing to the next instruction,
C/D
0
0
1
1
0
0
1
1
I/O
0
1
0
1
0
1
0
1
(ISTAT), bit 2) is set, the LSI53C825A
SCSI Phase
Data-Out
Data-In
Command
Status
Reserved-Out
Reserved-In
Message-Out
Message-In
DMA SCRIPTS Pointer
register is used as a
[26:24]
DMA
5-33
23

Related parts for LSI53C825AJ